Semiconductor device and manufacturing method thereof
In a method of manufacturing a negative capacitance structure, a dielectric layer is formed over a substrate. A first metallic layer is formed over the dielectric layer. After the first metallic layer is formed, an annealing operation is performed, followed by a cooling operation. A second metallic layer is formed. After the cooling operation, the dielectric layer becomes a ferroelectric dielectric layer including an orthorhombic crystal phase.
1. A negative capacitance structure, comprising:
a first conductive layer;
a ferroelectric dielectric layer disposed on and in direct contact with the first conductive layer; and
a second conductive layer disposed over the ferroelectric dielectric layer,
wherein the ferroelectric dielectric layer includes an orthorhombic crystal phase, and
the ferroelectric dielectric layer further includes at least one of a monolithic phase or a tetragonal phase and the orthorhombic crystal phase is at least 80% of the ferroelectric layer.
2. The negative capacitance structure of claim 1 , wherein the ferroelectric dielectric layer includes HfO 2 doped with one or more selected from the group consisting of Si, Zr, Al, La, Y, Gd and Sr.
3. The negative capacitance structure of claim 1 , wherein the ferroelectric dielectric layer includes HfO 2 doped with at least one selected from the group consisting of Si and Zr.
4. The negative capacitance structure of claim 3 , wherein the ferroelectric dielectric layer further includes Ti in an amount of 2-5 mol %.
5. The negative capacitance structure of claim 3 , wherein the ferroelectric dielectric layer further includes Al in an amount of 5-7 mol %.
6. The negative capacitance structure of claim 1 , wherein the ferroelectric dielectric layer includes HfO 2 doped with Si in an amount of 2-6 mol %.
7. The negative capacitance structure of claim 1 , wherein the ferroelectric dielectric layer includes HfZrO 2 .
8. The negative capacitance structure of claim 1 , wherein the second conductive layer includes TiN or TiN doped with Si.
9. A negative capacitance field effect transistor (NC-FET), comprising:
a channel layer made of a semiconductor;
a ferroelectric dielectric layer disposed over the channel layer; and
a gate electrode layer disposed over the ferroelectric dielectric layer,
wherein the ferroelectric dielectric layer includes an orthorhombic crystal phase and at least one of a monolithic phase or a tetragonal phase, and
the orthorhombic crystal phase is at least 80% of the ferroelectric layer.
10. The NC-FET of claim 9 , wherein the ferroelectric dielectric layer includes HfO 2 doped with one or more selected from the group consisting of Si, Zr, Al, La, Y, Gd and Sr.
11. The NC-FET of claim 9 , wherein the ferroelectric dielectric layer includes HfO 2 doped with at least one selected from the group consisting of Si and Zr.
12. The NC-FET of claim 11 , wherein:
the gate electrode layer includes a first conductive layer disposed on the ferroelectric dielectric layer, and
the first conductive layer is made of TiN or TiN doped with one or more elements.
13. The NC-FET of claim 12 , wherein:
the gate electrode layer further includes a second conductive layer disposed on the first conductive layer, and
the second conductive layer is made of TaN.
14. The NC-FET of claim 13 , wherein:
the gate electrode layer further includes a work function adjustment layer disposed on the second conductive layer, and a tungsten layer disposed over the work function adjustment layer.
15. The NC-FET of claim 14 , wherein the NC-FET is a p-type FET and the work function adjustment layer includes TiN.
16. A negative capacitance field effect transistor (NC-FET), comprising:
a fin structure having a channel layer made of a semiconductor, the channel layer protruding from an isolation insulating layer;
a first dielectric layer disposed over the channel layer;
a ferroelectric dielectric layer disposed over the first dielectric layer;
a gate electrode layer disposed over the ferroelectric dielectric layer; and
gate sidewall spacers,
wherein the ferroelectric dielectric layer includes HfO 2 including an orthorhombic crystal phase, disposed on the first dielectric layer, and the isolation insulating layer, and
the ferroelectric dielectric layer further includes at least one of a monolithic phase or a tetragonal phase and the orthorhombic crystal phase is at least 80% of the ferroelectric layer.