Semiconductor device and manufacturing method thereof
In in a method of manufacturing a semiconductor device, an interlayer dielectric (ILD) layer is formed over an underlying structure. The underlying structure includes a gate structure disposed over a channel region of a fin structure, and a first source/drain epitaxial layer disposed at a source/drain region of the fin structure. A first opening is formed over the first source/drain epitaxial layer by etching a part of the ILD layer and an upper portion of the first source/drain epitaxial layer. A second source/drain epitaxial layer is formed over the etched first source/drain epitaxial layer. A conductive material is formed over the second source/drain epitaxial layer.
1. A semiconductor device, comprising:
a gate structure disposed over a channel region of a fin structure;
a source/drain structure disposed at a source/drain region of the fin structure;
an etch-stop layer covering side faces of the source/drain structure; and
a conductive contact disposed over the source/drain structure, wherein:
the source/drain structure includes a first epitaxial layer and a second epitaxial layer disposed over the first epitaxial layer, and
the second epitaxial layer is disposed on an upper portion of the etch-stop layer.
2. The semiconductor device of claim 1 , wherein the second epitaxial layer is disposed in a recess formed in the first epitaxial layer.
3. The semiconductor device of claim 1 , further comprising a silicide layer disposed between the second epitaxial layer and the conductive contact.
4. The semiconductor device of claim 3 , wherein the silicide layer includes titanium silicide.
5. The semiconductor device of claim 1 , wherein the first epitaxial layer has a different composition than the second epitaxial layer.
6. The semiconductor device of claim 1 , wherein:
the first epitaxial layer and the second epitaxial layer contain germanium, and
a concentration of germanium in the second epitaxial layer is higher than a concentration of germanium in the first epitaxial layer.
7. The semiconductor device of claim 6 , wherein:
at least one of the first source/drain epitaxial layer and the second source/drain epitaxial layer further contains boron.
8. The semiconductor device of claim 7 , wherein a concentration of boron is in a range from 1.0×10 20 cm −3 to 6.0×10 21 cm −3 .
9. The semiconductor device of claim 1 , wherein:
the first epitaxial layer includes Si 1-x Ge x and the second epitaxial layer includes Si 1-y Ge y , and
0.15≤x≤0.8, 0.2≤y≤1.0 and x<y.
10. The semiconductor device of claim 1 , wherein the second epitaxial layer includes one selected from the group consisting of SiP, InP and GaInP.
11. The semiconductor device of claim 10 , wherein a concentration of phosphorous in the second epitaxial layer is in a range from 1.0×10 20 cm −3 to 6.0×10 21 cm −3 .
12. The semiconductor device of claim 1 , wherein the first epitaxial layer is formed in a recess disposed in the fin structure.
13. A semiconductor device, comprising:
a first fin field effect transistor (FinFET) including a first gate structure disposed over a first channel region of a first fin structure, a first source/drain structure disposed at a first source/drain region of the first fin structure, and a first etch-stop layer covering side faces of the first source/drain structure;
a second FinFET including a second gate structure disposed over a second channel region of a second fin structure, a second source/drain structure disposed at a second source/drain region of the second fin structure, and a second etch-stop layer covering side faces of the second source/drain structure, wherein:
the first FinFET is a first conductivity-type and the second FinFET is a second conductive type,
the first source/drain structure includes a first lower epitaxial layer and a first upper epitaxial layer disposed over the first lower epitaxial layer, and
the first upper epitaxial layer is disposed on an upper portion of the first etch-stop layer.
14. The semiconductor device of claim 13 , further comprising:
a first silicide layer disposed on the first upper epitaxial layer; and
a first conductive contact disposed on the first silicide layer.
15. The semiconductor device of claim 13 , wherein:
the second source/drain structure includes a second lower epitaxial layer and a second upper epitaxial layer disposed over the second lower epitaxial layer, and
the second upper epitaxial layer is disposed on an upper portion of the second etch-stop layer.
16. The semiconductor device of claim 15 , further comprising:
a first silicide layer disposed on the first upper epitaxial layer; and
a first conductive contact disposed on the first silicide layer.
17. The semiconductor device of claim 15 , wherein the second upper epitaxial layer includes one selected from the group consisting of SiP, InP and GaInP.
18. The semiconductor device of claim 13 , wherein:
the first lower epitaxial layer and the first upper epitaxial layer contain germanium, and
a concentration of germanium in the first upper epitaxial layer is higher than a concentration of germanium in the first lower epitaxial layer.
19. The semiconductor device of claim 17 , wherein:
at least one of the first lower epitaxial layer and the first upper epitaxial layer further contains boron.
20. A semiconductor device, comprising:
a gate structure disposed over a channel region of a fin structure;
a source/drain structure disposed at a source/drain region of the fin structure and including a first epitaxial layer;
a cover layer covering side faces of the first epitaxial layer and made of silicon nitride; and
a conductive contact disposed over the source/drain structure, wherein:
the source/drain structure further includes a second epitaxial layer disposed over the first epitaxial layer, and
the second epitaxial layer is disposed on an upper portion of the cover layer.