IP Library Granted Patent US 10,825,761
Granted Patent B2
US 10,825,761 · App. 16/200,843 · Granted Nov 3, 2020

Electronic devices having tapered edge walls

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Quick Facts
Patent No.
US 10,825,761
App. No.
16/200,843
Granted
Nov 3, 2020
Kind
B2
Abstract

An electronic device includes a substrate, a structure over the substrate having an edge wall defining at least a portion of an opening exposing a surface of the substrate, and a dielectric material adjacent and in contact with the edge wall and an adjacent portion of the surface of the substrate. The dielectric material has a profile tapering downward from adjacent the edge wall toward the substrate. Other electronic devices include a substrate and a solder mask over the substrate. The solder mask defines an opening therethrough. A supplemental mask is within the opening of the solder mask, and has a sidewall that slopes away from the solder mask. A conductive structure is adjacent and in contact with at least one of the solder mask or the supplemental mask.

Claims (28)

1. An electronic device, comprising:

a substrate;

a structure over the substrate, the structure having an edge wall defining at least a portion of an opening exposing a surface of the substrate; and

a dielectric material laterally adjacent and in contact with the edge wall of the structure, the dielectric material also in contact with an adjacent portion of the surface of the substrate, the dielectric material having a profile tapering downward from adjacent the edge wall toward the substrate,

the structure comprising a different material than the dielectric material.

2. The electronic device of claim 1 , wherein the profile comprises a profile selected from the group consisting of a linear profile, a concave profile, and a convex profile.

3. The electronic device of claim 1 , wherein the structure comprises a mask structure.

4. The electronic device of claim 1 , wherein the structure comprises a conductive structure.

5. The electronic device of claim 4 , wherein the conductive structure comprises a trace or a bond pad.

6. The electronic device of claim 1 , wherein the dielectric material entirely surrounds an interface between the structure and the substrate.

7. The electronic device of claim 1 , further comprising an underfill material over the dielectric material.

8. The electronic device of claim 7 , wherein the underfill material comprises a nonconductive epoxy-based material.

9. The electronic device of claim 7 , wherein the underfill material has a thickness from about 10 μm to about 50 μm.

10. The electronic device of claim 1 , wherein the profile of the dielectric material exhibits a convex profile curving outward away from an interface between the structure and the substrate.

11. An electronic device, comprising:

a substrate;

a solder mask over the substrate, the solder mask defining an opening therethrough;

a supplemental mask within the opening of the solder mask, the supplemental mask having a sidewall that slopes away from the solder mask and exhibits a convex surface curving outward away from an interface between the solder mask and the substrate; and

a conductive structure adjacent and in contact with at least one of the solder mask or the supplemental mask.

12. The electronic device of claim 11 , further comprising another conductive material over and in contact with the conductive structure.

13. The electronic device of claim 12 , wherein the another conductive material comprises a pillar.

14. The electronic device of claim 12 , wherein the another conductive material comprises a material selected from the group consisting of solder, gold, copper, a conductive resin, and a conductor-filled resin.

15. The electronic device of claim 11 , wherein the supplemental mask intersects a major surface of the substrate at an angle between about 10° and about 80°.

16. The electronic device of claim 11 , wherein the supplemental mask has another sidewall that exhibits a concave surface curving inward toward the interface between the solder mask and the substrate.

17. The electronic device of claim 11 , wherein the supplemental mask has a maximum thickness in a direction normal to a major surface of the substrate, in a range from about 1 μm to about 1000 μm.

18. The electronic device of claim 11 , wherein the solder mask comprises a polymer.

19. The electronic device of claim 18 , wherein the solder mask comprises an epoxy.

20. The electronic device of claim 11 , wherein the substrate comprises a printed circuit board.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Nov 15, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051026/0568 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050718/0764 →
SUPPLEMENT NO. 11 TO PATENT SECURITY AGREEMENT Recorded Jan 16, 2019
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048082/0860 →
SUPPLEMENT NO. 2 TO PATENT SECURITY AGREEMENT Recorded Jan 16, 2019
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 048082/0889 →