Non-hermetic semiconductor optical amplifier integration on silicon photonics
Systems and methods for non-hermetic Semiconductor Optical Amplifier (SOA) integration on a Silicon photonic (SiP) chip using Complementary Metal-Oxide-Semiconductor (CMOS) processes include creating a trench for placement of the SOA, wherein the trench is between two Spot Size Converters (SSCs) located on the SiP chip outside of the trench; forming pedestals in the trench in one or more existing CMOS layers of the SiP chip to guide vertical alignment of the SOA with the SSCs during its placement; and depositing metallic traces and a solder pattern in the trench above the pedestals to enable the SOAs to electrically bond and rest on the pedestals during reflow.
1. A method for non-hermetic Semiconductor Optical Amplifier (SOA) integration on a Silicon photonic (SiP) chip using Complementary Metal-Oxide-Semiconductor (CMOS) processes, the method comprising:
creating a trench for placement of the SOA, wherein the trench is between two Spot Size Converters (SSCs) located on the SiP chip outside of the trench;
forming pedestals in the trench in one or more existing CMOS layers of the SiP chip to guide vertical alignment of the SOA with the SSCs during its placement; and
depositing metallic traces and a solder pattern in the trench above the pedestals to enable the SOAs to electrically bond and rest on the pedestals during reflow.
2. The method of claim 1 , further comprising:
utilizing one or more of scribing, blade dicing, and stealth dicing to achieve an SOA length commensurate for placement within the trench; and
placing the SOA in the trench utilizing the pedestals for the alignment.
3. The method of claim 2 , wherein the placing is performed by a die bonder.
4. The method of claim 2 , wherein the placing comprises:
subsequent to SOA placement, sending light via a laser through the SiP chip to melt the solder pattern;
pushing the SOA against the pedestals utilizing a die bonder that ensures height control of the SOA relative to the SSCs; and
stopping the laser, wherein the solder solidifies subsequent to laser stoppage.
5. The method of claim 2 , further comprising:
utilizing an optical adhesive to form an optical junction between the SOA and the SSCs, rendering the SOA insensitive to the environment.
6. The method of claim 2 , further comprising:
flip-chip attaching the SiP chip to a substrate.
7. The method of claim 6 , wherein the substrate includes a cavity located where the SOA is integrated into the SiP chip.
8. The method of claim 2 , wherein the SOA is angled for back-reflection.
9. A Silicon photonic (SiP) chip with non-hermetic Semiconductor Optical Amplifier (SOA) integration formed by a process comprising the steps of:
creating a trench for placement of the SOA, wherein the trench is between two Spot Size Converters (SSCs) located on the SiP chip outside of the trench;
forming pedestals in the trench in one or more existing CMOS layers of the SiP chip to guide vertical alignment of the SOA with the SSCs during its placement; and
depositing metallic traces and a solder pattern in the trench above the pedestals to enable the SOAs to electrically bond and rest on the pedestals during reflow.
10. The SiP chip of claim 8 , further comprising the steps of:
utilizing one or more of precise scribing, blade dicing, and stealth dicing to achieve an SOA length commensurate for placement within the trench; and
placing the SOA in the trench utilizing the pedestals.
11. The SiP chip of claim 9 , wherein the placing is performed by a die bonder.
12. The SiP chip of claim 9 , wherein the placing comprises:
subsequent to SOA placement, sending light via a laser through the SiP chip to melt the solder pattern;
pushing the SOA against the pedestals utilizing a die bonder which ensures height control of the SOA relative to the SSCs; and
stopping the laser, wherein the solder solidifies subsequent to laser stoppage.
13. The SiP chip of claim 9 , further comprising the steps of:
utilizing an optical adhesive to form an optical junction between the SOA and the SSCs, rendering the SOA insensitive to the environment.
14. The SiP chip of claim 9 , further comprising the steps of:
flip-chip attaching the SiP chip to a substrate.
15. The SiP chip of claim 13 , wherein the substrate includes a cavity located where the SOA is integrated into the SiP chip.
16. The SiP chip of claim 9 , wherein the SOA is angled for back-reflection.
17. A Silicon photonic (SiP) chip with non-hermetic Semiconductor Optical Amplifier (SOA) integration, the SiP chip comprising:
a modulator formed on the SiP chip;
a transmitter output formed on the SiP chip;
one or more SOAs placed on the SiP chip and connected to the transmitter output, each SOA is placed in a trench on the SiP chip with two Spot Size Converters (SSCs) connected thereto and each of the SSCs are on each side of the trench,
wherein each SOA is electrically bonded and rests on pedestals in the trench via deposited metallic traces and solder pattern above the pedestals.
18. The SiP chip of claim 17 , wherein the SOA is angled for back-reflection.
19. The SiP chip of claim 17 , wherein the SiP chip is a coherent transceiver, and the one or more SOAs includes two SOAs, one for each of an X and Y polarization of a transmitted signal.
20. The SiP chip of claim 19 , wherein the two SOAs are equalized based on the power of the X and Y polarization of the transmitted signal.