IP Library Granted Patent US 10,790,328
Granted Patent B2
US 10,790,328 · App. 16/202,665 · Granted Sep 29, 2020

Semiconductor package and camera module

Inventors: Osamu Shirata (Tokyo, JP); Yusuke Hidaka (Tokyo, JP)
Assignee: Asahi Kasei Microdevices Corporation
H01L27/14636H01L27/14618H01L27/14627H04N5/2253
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Quick Facts
Patent No.
US 10,790,328
App. No.
16/202,665
Granted
Sep 29, 2020
Kind
B2
Abstract

To achieve a size reduction of a semiconductor package while securing stability in mounting. Three terminals t 1 , t 2 , and t 4 are individually arranged on a semiconductor package 10 having a rectangular shape as viewed in plan in such a manner that the center in the longitudinal direction of the semiconductor package 10 of each of the three terminals t 1 , t 2 , and t 4 and the center in the longitudinal direction of each of the other terminals are not overlapped with each other as viewed from the side of the long side. The terminal t 4 and the other terminals t 1 and t 2 are arranged in such a manner that the terminal t 4 and the other terminals t 1 and t 2 are present on mutually different sides across a line segment M passing through the center in the width direction, an angle θ formed by two line segments connecting the center of gravity of the terminal t 4 , the position in the longitudinal direction of which is the center, and the center of gravity of each of the other terminals t 1 and t 2 is 60° or more, and a width L 1 of the semiconductor package 10 and a distance Lt between the rightmost end position of the terminal t 4 arranged at the rightmost end in the width direction of the semiconductor package 10 and the leftmost end position of the terminal t 1 or t 2 arranged at the leftmost position in the width direction satisfy Lt/L 1 ≤0.5.

Claims (27)

1. A semiconductor package of a wafer level chip size package type, the semiconductor package comprising terminals, wherein

the semiconductor package has a long and narrow rectangular shape as viewed in plan,

for any three terminals from among all of the terminals, an angle formed by two line segments connecting a center of gravity of the terminal positioned in a center in the longitudinal direction and a center of gravity of each of the other two terminals is 60° or more,

a width L 1 of the semiconductor package and a distance Lt between a rightmost end position of the terminal arranged at the rightmost end in a width direction of the semiconductor package among all of the terminals and a leftmost end position of the terminal arranged at the leftmost end in the width direction satisfy Lt/L 1 ≥0.5, and

wherein all of the terminals are spaced apart from a line segment passing through a center in the width direction of the semiconductor package with terminals of a first portion of all the terminals arranged on a first side across the line segment and a second portion of all the terminals other than the first portion arranged on a second side across the line segment.

2. The semiconductor package according to claim 1 , wherein

the terminals are arranged in zigzag along the longitudinal direction of the semiconductor package, and

only two arrays are arranged in the width direction.

3. The semiconductor package according to claim 1 , wherein

an aspect ratio is 2 or more and 4 or less,

a short side is 0.35 mm or more and 0.8 mm or less, and

a width of the terminal is 0.15 mm or more and 0.3 mm or less.

4. The semiconductor package according to claim 1 , wherein the semiconductor package includes 4 or more and 10 or less terminals as the terminals.

5. The semiconductor package according to claim 1 , wherein the semiconductor package includes a sensor.

6. A camera module comprising:

two or more of the semiconductor packages according to claim 1 , wherein

the semiconductor packages are arranged along a periphery of an adjustment mechanism adjusting a lens position of a camera as viewed in plan, and

the longitudinal directions of the semiconductor packages are orthogonal to each other.

7. The semiconductor package according to claim 2 , wherein

an aspect ratio is 2 or more and 4 or less,

a short side is 0.35 mm or more and 0.8 mm or less, and

a width of the terminal is 0.15 mm or more and 0.3 mm or less.

8. The semiconductor package according to claim 2 , wherein the semiconductor package includes 4 or more and 10 or less terminals as the terminals.

9. The semiconductor package according to claim 3 , wherein the semiconductor package includes 4 or more and 10 or less terminals as the terminals.

10. The semiconductor package according to claim 2 , wherein the semiconductor package includes a sensor.

11. The semiconductor package according to claim 3 , wherein the semiconductor package includes a sensor.

12. The semiconductor package according to claim 4 , wherein the semiconductor package includes a sensor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2019
From: SHIRATA, OSAMU; HIDAKA, YUSUKE
To: ASAHI KASEI MICRODEVICES CORPORATION
Reel/Frame 047954/0962 →
Priority Claims (2)
JP 2017-227584 · Nov 28, 2017 · national
JP 2018-200361 · Oct 24, 2018 · national
Continuity (1)
Related Publication 20190165031A1 · May 30, 2019
Cited By (1)
US 12,543,510