IP Library Granted Patent US 10,699,780
Granted Patent B2
US 10,699,780 · App. 16/209,152 · Granted Jun 30, 2020

Reflow protection

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Quick Facts
Patent No.
US 10,699,780
App. No.
16/209,152
Granted
Jun 30, 2020
Kind
B2
Abstract

Devices and techniques to reduce corruption of received data during assembly are disclosed herein. A memory device can perform operations to store received data, including preloaded data, in a first mode until the received data exceeds a threshold amount, and to transition from the first mode to a second mode after the received data exceeds the threshold amount.

Claims (59)

1. A memory device configured to reduce corruption of received data during assembly, the memory device comprising:

a memory array having groups of multiple blocks of memory cells; and

a memory controller operably coupled to the memory array, the memory controller to perform operations comprising:

store received data on the memory array in a first mode having a first threshold temperature margin until the received data exceeds a threshold amount; and

transition from the first mode to a second mode having a second threshold temperature margin after the received data exceeds the threshold amount, wherein the second threshold temperature margin is less than the first threshold temperature margin.

2. The memory device of claim 1 , wherein the memory controller is configured to store received data, including preloaded data, on the memory array in the first mode until the received data exceeds the threshold amount,

wherein the threshold amount is greater than the preloaded data,

wherein the first mode is a reflow-protection mode and the second mode is a normal-operation mode.

3. The memory device of claim 2 , wherein the memory controller is configured to store the preloaded data on the memory array in the reflow-protection mode as single-level cells (SLC) to reduce corruption of the preloaded data during assembly of the electronic device including the memory device, and to store the received data in the second mode on the memory array as multi-level cells (MLC).

4. The memory device of claim 3 , wherein, after the received data exceeds the threshold amount, the memory controller is configured to store the received data stored in the first mode as SLC to the memory array as MLC.

5. The memory device of claim 2 , wherein, because the threshold amount is greater than the amount of preloaded data, the memory device is configured to store received data in the reflow-protection mode for a short time after assembly of the electronic device, then transition after assembly of the electronic device to the normal-operation mode after the received data exceeds the threshold amount, without receiving a separate indication from a host device of completed assembly.

6. The memory device of claim 2 , wherein the memory controller is configured to receive the threshold amount from a host device prior to receiving the preloaded data.

7. The memory device of claim 2 , wherein the memory controller is configured to transition from the first mode to the second mode without receiving a separate verification of preloaded data.

8. The memory device of claim 1 , wherein the memory controller is configured to store received data on the memory array at a first level in the first mode, the first level having a first memory density, and

wherein the memory controller is configured to store received data on the memory array at a second level in the second mode, the second level having a second memory density greater than the first memory density.

9. The memory device of claim 1 , wherein the memory controller is configured to perform background operations in the second mode, and to suspend background operations in the first mode, wherein background operations include data migration, and

wherein the threshold amount is 5 gigabytes (GB) of data.

10. The memory device of claim 1 , wherein the memory controller is configured to transition from the first mode to the second mode without receiving a separate indication of completed assembly.

11. A method for managing a memory device to reduce corruption of received data during assembly, the method comprising a number of operations performed by a memory controller of a memory array, the memory array having groups of multiple blocks of memory cells, the operations comprising:

storing received data on the memory array in a first mode having a first threshold temperature margin until the received data exceeds a threshold amount; and

transitioning from the first mode to a second mode having a second threshold temperature margin after the received data exceeds the threshold amount,

wherein the second threshold temperature margin is less than the first threshold temperature margin.

12. The method of claim 11 , wherein storing received data on the memory array in the first mode includes storing preloaded data on the memory array in the first mode until the received data exceeds the threshold amount,

wherein the threshold amount is greater than the preloaded data, and

wherein the first mode is a reflow-protection mode and the second mode is a normal-operation mode.

13. The method of claim 12 , the operations comprising:

writing received data in the reflow-protection mode on the memory array as single-level cells (SLC); and

writing received data in the normal-operation mode on the memory array as multi-level cells (MLC),

wherein preloaded data includes a kernel and pre-loaded software for an electronic device configured to include the memory device, and

wherein writing received data in the reflow-protection mode as SLC includes to reduce corruption of the preloaded data during assembly of the electronic device including the memory device.

14. The method of claim 12 , wherein transitioning from the reflow-protection mode to the normal-operation mode includes writing the received data stored in the reflow-protection mode as SLC to the memory array as MLC.

15. A memory device configured to reduce corruption of received data during assembly, the memory device comprising:

a memory array having groups of multiple blocks of memory cells; and

a memory controller operably coupled to the memory array, the memory controller to perform operations comprising:

store received data on the memory array in a first mode having a first density until the received data exceeds a threshold amount; and

transition from the first mode to a second mode having a second density after the received data exceeds the threshold amountwherein the second density is greater than the first density.

16. The memory device of claim 15 , wherein the memory controller is configured to store received data, including preloaded data, on the memory array in the first mode until the received data exceeds the threshold amount,

wherein the threshold amount is greater than the preloaded data, and

wherein the first mode is a reflow-protection mode and the second mode is a normal-operation mode.

17. The memory device of claim 16 , wherein the memory controller is configured to store the preloaded data on the memory array in the reflow-protection mode as single-level cells (SLC) to reduce corruption of the preloaded data during assembly of the electronic device including the memory device, and to store the received data in the second mode on the memory array as multi-level cells (MLC).

18. The memory device of claim 16 , wherein, because the threshold amount is greater than the amount of preloaded data, the memory device is configured to store received data in the reflow-protection mode for a short time after assembly of the electronic device, then transition after assembly of the electronic device to the normal-operation mode after the received data exceeds the threshold amount, without receiving a separate indication from a host device of completed assembly.

19. The memory device of claim 16 , wherein the memory controller is configured to transition from the first mode to the second mode without receiving a separate verification of preloaded data.

20. The memory device of claim 15 , wherein the memory controller is configured to store received data on the memory array in the first mode having a first threshold temperature margin, and in the second mode having a second threshold temperature margin, and

wherein the second threshold temperature margin is less than the first threshold temperature margin.

21. The memory device of claim 15 , wherein the memory controller is configured to perform background operations in the second mode, and to suspend background operations in the first mode, wherein background operations include data migration, and

wherein the threshold amount is 5 gigabytes (GB) of data.

22. The memory device of claim 15 , wherein the memory controller is configured to transition from the first mode to the second mode without receiving a separate indication of completed assembly.

23. A method for managing a memory device to reduce corruption of received data during assembly, the method comprising a number of operations performed by a memory controller of a memory array, the memory array having groups of multiple blocks of memory cells, the operations comprising:

storing received data on the memory array in a first e having a first density until the received data exceeds a threshold amount; and

transitioning from the first mode to a second mode having a second density after the received data exceeds the threshold amount wherein the second density is greater than the first density.

24. The method of claim 23 , wherein storing received data on the memory array in the first mode includes storing preloaded data on the memory array in the first mode until the received data exceeds the threshold amount,

wherein the threshold amount is greater than the preloaded data, and

wherein the first mode is a reflow-protection mode and the second mode is a normal-operation mode.

25. The method of claim 24 , the operations comprising:

writing received data in the reflow-protection mode on the memory array as single-level cells (SLC) having a first threshold temperature margin; and

writing received data in the normal-operation mode on the memory array as multi-level cells (MLC) second threshold temperature margin,

wherein the second threshold temperature margin is less than the first threshold temperature margin,

wherein preloaded data includes a kernel and pre-loaded software for an electronic device configured to include the memory device, and

wherein writing received data in the reflow-protection mode as SLC includes to reduce corruption of the preloaded data during assembly of the electronic device including the memory, device.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Nov 15, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051026/0568 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050718/0764 →
SUPPLEMENT NO. 11 TO PATENT SECURITY AGREEMENT Recorded Jan 16, 2019
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048082/0860 →
SUPPLEMENT NO. 2 TO PATENT SECURITY AGREEMENT Recorded Jan 16, 2019
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 048082/0889 →