IP Library › Granted Patent US 10,629,755
Granted Patent B1
US 10,629,755 · App. 16/214,037 · Granted Apr 21, 2020

Staggered-bias varactor

Inventors: Ahmed Emira (San Diego, CA); Faisal Hussein (San Diego, CA)
Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
H01L29/93H03H7/20
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,629,755
App. No.
16/214,037
Granted
Apr 21, 2020
Kind
B1
Abstract

Techniques are described for staggered-bias varactors. For example, a staggered-bias varactor can include a control voltage node, a number of bias voltage nodes, and a number of sub-varactors coupled in parallel. The control voltage node can be configured to receive a single, variable control voltage; and the bias voltage nodes can each be configured to receive a different, fixed bias voltage. Each sub-varactor is configured, so that its equivalent capacitance is a function of a difference between the control voltage and a respective one of the bias voltages; and the equivalent capacitance of the staggered-bias varactor is a function of the capacitances of the component sub-varactors. The number of varactors and the bias voltages can be configured, so that respective non-linear capacitive responses of the component sub-varactors effectively combine to yield a substantially linear capacitive response for the staggered-bias varactor as a whole.

Claims (56)

1. A staggered-bias varactor comprising:

a pair of varactor terminals;

a control voltage node;

N bias voltage input nodes, wherein N is a positive integer greater than one; and

N sub-varactors, each coupled between the pair of varactor terminals, and having a variable capacitance portion coupled with the control voltage node and with a respective one of the N bias voltage nodes, the variable capacitance portion comprising:

a first capacitor coupled between the respective first bias voltage terminal and a respective control voltage terminal; and

a second capacitor coupled between the respective control voltage terminal and a respective second bias voltage terminal,

wherein the first bias voltage terminal is coupled with a first of the pair of varactor terminals and with the respective one of the N bias voltage nodes, and the second bias voltage terminal is coupled with a second of the pair of varactor terminals and with the respective one of the N bias voltage nodes,

wherein, for each sub-varactor, the first capacitor and the second capacitor have a same nominal capacitance,

such that a respective sub-varactor capacitance of each sub-varactor varies as a function of a control voltage applied at the control voltage node and a different respective bias voltage applied at each respective one of the N bias voltage nodes.

2. The staggered-bias varactor of claim 1 , wherein:

for each sub-varactor, the respective sub-varactor capacitance varies non-linearly as a function of the control voltage applied at the control voltage node; and

in response to applying the different respective bias voltage at each respective one of the N bias voltage nodes, a total varactor capacitance across the N sub-varactors in parallel varies substantially linearly to as a function of the control voltage.

3. The staggered-bias varactor of claim 1 , wherein the first bias voltage terminal is coupled with the first of the pair of varactor terminals via a third capacitor.

4. The staggered-bias varactor of claim 1 , wherein the second bias voltage terminal is coupled with the second of the pair of varactor terminals via a fourth capacitor.

5. The staggered-bias varactor of claim 1 , wherein the respective first bias voltage terminal and the respective second bias voltage terminal are each coupled with the respective one of the N bias voltage nodes via a respective resistor.

6. A method for controlling a total capacitance across varactor terminals of a staggered-bias varactor, the method comprising:

applying a respective one of N different fixed bias voltage levels at each of N bias voltage input nodes of the staggered-bias varactor, wherein N is a positive integer greater than one; and

varying a control voltage level applied at a control voltage node,

wherein the staggered-bias varactor comprises N sub-varactors, each coupled between the varactor terminals, and each having a variable capacitance portion coupled with the control voltage node and with a respective one of the N bias voltage nodes,

the variable capacitance portion comprising:

a first capacitor coupled between the respective first bias voltage terminal and a respective control voltage terminal; and

a second capacitor coupled between the respective control voltage terminal and a respective second bias voltage terminal,

wherein the first bias voltage terminal is coupled with a first of the pair of varactor terminals and with the respective one of the N bias voltage nodes, and the second bias voltage terminal is coupled with a second of the pair of varactor terminals and with the respective one of the N bias voltage nodes,

wherein, for each sub-varactor, the first capacitor and the second capacitor have a same nominal capacitance,

such that a respective sub-varactor capacitance of each sub-varactor varies in response to varying the control voltage level.

7. The method of claim 6 , further comprising:

setting the N different fixed bias voltage levels, such that, in response to applying the respective one of the N different fixed bias voltage level at each of the N bias voltage input nodes:

the respective sub-varactor capacitance of each sub-varactor varies non-linearly in response to varying the control voltage level; and

the total capacitance of the staggered-bias varactor varies substantially linearly in response to varying the control voltage level, the total capacitance of the staggered-bias varactor being a capacitance across the N sub-varactors in parallel.

8. An oscillator system comprising:

a capacitor-controlled oscillator to generate an output signal at an oscillator frequency; and

a varactor having varactor terminals coupled with the capacitor-controlled oscillator, the varactor comprising:

a control voltage node;

N bias voltage input nodes, wherein N is a positive integer greater than one; and

N sub-varactors, each coupled between the varactor terminals, and having a variable capacitance portion coupled with the control voltage node and with a respective one of the N bias voltage nodes, the variable capacitance portion comprising:

a first capacitor coupled between the respective first bias voltage terminal and a respective control voltage terminal; and

a second capacitor coupled between the respective control voltage terminal and a respective second bias voltage terminal,

wherein the first bias voltage terminal is coupled with a first of the pair of varactor terminals and with the respective one of the N bias voltage nodes, and the second bias voltage terminal is coupled with a second of the pair of varactor terminals and with the respective one of the N bias voltage nodes,

wherein, for each sub-varactor, the first capacitor and the second capacitor have a same nominal capacitance,

such that a respective sub-varactor capacitance of each sub-varactor varies as a function of a control voltage applied at the control voltage node and a respective bias voltage applied at the respective one of the N bias voltage nodes, and

such that the oscillator frequency is a function of a total capacitance of the N respective sub-varactor capacitances in parallel.

9. The oscillator system of claim 8 , wherein the capacitor-controlled oscillator is an inductive-capacitive (LC) oscillator, wherein a resonant frequency of the LC oscillator is responsive to the total capacitance of the N respective sub-varactor capacitances in parallel.

10. The oscillator system of claim 8 , wherein the capacitor-controlled oscillator is a ring oscillator, wherein a ring delay is responsive to the total capacitance of the N respective sub-varactor capacitances in parallel.

11. The oscillator system of claim 8 , further comprising:

a phase-locked loop (PLL) comprising a voltage-controlled oscillator (VCO), a PLL output frequency of the PLL being controlled by the VCO, the VCO comprising the capacitor-controlled oscillator and the varactor.

12. The oscillator system of claim 8 , wherein:

a different respective bias voltage is applied at each respective one of the N bias voltage nodes.

13. The oscillator system of claim 12 , wherein:

for each sub-varactor, the respective sub-varactor capacitance varies non-linearly as a function of the control voltage applied at the control voltage node; and

in response to applying the different respective bias voltage at each respective one of the N bias voltage nodes, the total capacitance of the N respective sub-varactor capacitances in parallel varies substantially linearly to as a function of the control voltage.

14. The oscillator system of claim 8 , wherein, for each sub-varactor:

the first respective bias voltage terminal is coupled with the first of the pair of varactor terminals via a third capacitor; and

the second respective bias voltage terminal is coupled with the second of the pair of varactor terminals via a fourth capacitor.

15. The oscillator system of claim 8 , wherein, for each sub-varactor:

each of the first respective bias voltage terminal and the second respective bias voltage terminal is coupled with the respective one of the N bias voltage nodes via a respective resistor.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 12, 2019
From: GOODIX TECHNOLOGY INC.
To: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
Reel/Frame 048568/0067 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2018
From: EMIRA, AHMED; HUSSEIN, FAISAL
To: GOODIX TECHNOLOGY INC.
Reel/Frame 047715/0083 →