IP Library Granted Patent US 10,777,297
Granted Patent B2
US 10,777,297 · App. 16/215,327 · Granted Sep 15, 2020

Age-based refresh of firmware

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Quick Facts
Patent No.
US 10,777,297
App. No.
16/215,327
Granted
Sep 15, 2020
Kind
B2
Abstract

A method to refresh copies of firmware based on ages of those copies of the firmware is described. The method includes determining, by a memory subsystem, an age of a first copy of firmware, which is stored in the memory components of the memory subsystem, is greater than a refresh interval, wherein the age of the copy of firmware is tracked in a firmware age table. In response to determining that the age of the first copy of the firmware is greater than the refresh interval, the memory subsystem refreshes the first copy of the firmware in the memory components. Further, the memory subsystem updates the age of the first copy of the firmware in the firmware age table in response to refreshing the first copy of the firmware.

Claims (51)

1. A method comprising:

writing, by a memory subsystem, a first copy and a second copy of firmware in memory components of the memory subsystem;

setting, by the memory subsystem in a firmware age table, an age of the first copy of the firmware and an age of the second copy of the firmware, wherein the age of the first copy of the firmware is set to be separated from the age of the second copy of the firmware by a predefined amount;

determining, by the memory subsystem, whether the age of the first copy of firmware in the firmware age table, which is stored in the memory components of the memory subsystem, is greater than a refresh interval;

refreshing, by the memory subsystem, the first copy of the firmware in the memory components in response to determining that the age of the first copy of the firmware is greater than the refresh interval; and

updating, by the memory subsystem, the age of the first copy of the firmware in the firmware age table in response to refreshing the first copy of the firmware.

2. The method of claim 1 , wherein the memory components store multiple copies of the firmware, including the first copy of the firmware and the second copy of the firmware, and

wherein the firmware age table tracks ages of the multiple copies of the firmware.

3. The method of claim 2 , wherein the firmware age table includes an entry for each of the multiple copies of the firmware and each entry includes an identifier for each of the multiple copies of the firmware and a timestamp associated with an age of each copy of the firmware that indicates a last write or last refresh of a corresponding copy of the firmware in the memory components.

4. The method of claim 1 , wherein the refresh interval is set based on a type of the memory components.

5. The method of claim 1 , wherein the refresh interval is updated based on one or more of an age and wear level of the memory components.

6. The method of claim 1 , further comprising:

reading, by the memory subsystem, the first copy of the firmware from the memory components;

performing, by the memory subsystem, error correction on the read first copy of the firmware to generate an error corrected copy of the read first copy of the firmware;

reading, by the memory subsystem, the second copy of the firmware from the memory components for use by the memory subsystem when the read first copy of the firmware has a number of bit errors that is greater than or equal to a correctable threshold error value; and

loading, by the memory subsystem, the error corrected copy of the firmware when the read first copy of the firmware has a number of bit errors that is less than the correctable threshold error value.

7. The method of claim 6 , further comprising:

performing, by the memory subsystem, error correction on the read second copy of the firmware to generate an error corrected copy of the read second copy of the firmware, wherein the error corrected copy of the read second copy of the firmware is loaded by the memory subsystem when the read second copy of the firmware has a number of bit errors that is less than the correctable threshold error value; and

loading, by the memory subsystem, the error corrected copy of the read second copy of the firmware to a location in the memory components corresponding to the first copy of the firmware when the read second copy of the firmware has a number of bit errors that is less than the correctable threshold error value.

8. A system comprising:

a plurality of memory components; and

a processing device, operatively coupled with the plurality of memory components, to:

write a first copy and a second copy of firmware in the plurality of memory components;

set in a firmware age table an age of the first copy of the firmware and an age of the second copy of the firmware, wherein the age of the first copy of the firmware is set to be separated from the age of the second copy of the firmware by a predefined amount;

refresh the first copy of firmware in the plurality of memory components in response to determining that the age of the first copy of the firmware is greater than a refresh interval; and

update the age of the first copy of the firmware in the firmware age table in response to refreshing the first copy of the firmware.

9. The system of claim 8 , wherein the plurality of memory components store multiple copies of the firmware, including the first copy of the firmware and the second copy of the firmware, and

wherein the firmware age table tracks ages of the multiple copies of the firmware.

10. The system of claim 9 , wherein the firmware age table includes an entry for each of the multiple copies of the firmware and each entry includes an identifier for each of the multiple copies of the firmware and a timestamp associated with an age of each copy of the firmware that indicates a last write or last refresh of a corresponding copy of the firmware in the plurality of memory components.

11. The system of claim 8 , wherein the refresh interval is set based on a type of the plurality of memory components.

12. The system of claim 8 , wherein the refresh interval is updated based on one or more of an age and wear level of the plurality of memory components.

13. The system of claim 8 , wherein the processing device is further to:

read the first copy of the firmware from the plurality of memory components;

perform error correction on the read first copy of the firmware to generate an error corrected copy of the read first copy of the firmware;

read the second copy of the firmware from the plurality of memory components for use by the system when the read first copy of the firmware has a number of bit errors that is greater than or equal to a correctable threshold error value; and

load the error corrected copy of the firmware when the read first copy of the firmware has a number of bit errors that is less than a correctable threshold error value.

14. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:

write a first copy and a second copy of firmware in memory components of the processing device;

set in a firmware age table an age of the first copy of the firmware and an age of the second copy of the firmware, wherein the age of the first copy of the firmware is set to be separated from the age of the second copy of the firmware by a predefined amount;

determine whether the age of the first copy of firmware in the memory components is greater than a refresh interval;

refresh the first copy of the firmware in the memory components in response to determining that the age of the first copy of the firmware is greater than the refresh interval; and

update the age of the first copy of the firmware in the firmware age table in response to refreshing the first copy of the firmware.

15. The non-transitory computer-readable medium of claim 14 , wherein the memory components store multiple copies of the firmware, including the first copy of the firmware and the second copy of the firmware, and

wherein the firmware age table tracks ages of the multiple copies of the firmware.

16. The non-transitory computer-readable medium of claim 15 , wherein the firmware age table includes an entry for each of the multiple copies of the firmware and each entry includes an identifier for each of the multiple copies of the firmware and a timestamp associated with an age of each copy of the firmware that indicates a last write or last refresh of a corresponding copy of the firmware in the memory components.

17. The non-transitory computer-readable medium of claim 14 , wherein the refresh interval is set based on one or more of a type of the memory components, an age of the memory components, and a wear level of the memory components.

18. The non-transitory computer-readable medium of claim 14 , wherein the processing device is further to:

read the first copy of the firmware from the memory components;

perform error correction on the read first copy of the firmware to generate an error corrected copy of the read first copy of the firmware;

read the second copy of the firmware from the memory components for use by the memory subsystem when the read first copy of the firmware has a number of bit errors that is greater than or equal to a correctable threshold error value; and

load the error corrected copy of the firmware when the read first copy of the firmware has a number of bit errors that is less than a correctable threshold error value.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 15, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051026/0568 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050718/0764 →
SUPPLEMENT NO. 11 TO PATENT SECURITY AGREEMENT Recorded Jan 16, 2019
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048082/0860 →
SUPPLEMENT NO. 2 TO PATENT SECURITY AGREEMENT Recorded Jan 16, 2019
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 048082/0889 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2018
From: GYLLENSKOG, CHRISTIAN M.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047731/0836 →