Program operations in memory
The present disclosure includes apparatuses and methods related to program operations in memory. An example apparatus can perform a program operation on an array of memory cells by applying a first program signal to a first portion of the array of memory cells that are to remain in a first state in response to the program operation, wherein the first program signal programs memory cells to a second state and then to the first state.
1. An apparatus, comprising:
an array of memory cells; and
a controller configured to:
perform a pre-read operation to determine which memory cells of the array of memory cells will be programmed during a program operation; and
perform the program operation on the array of memory cells by applying a first program signal to a first portion of the array of memory cells that are to remain in a first state, wherein the first program signal programs memory cells to a second state and then to the first state, and wherein the first program signal includes a first portion applied during a first time period and a second portion applied during a second time period, wherein the second time period is different from the first time period.
2. The apparatus of claim 1 , wherein the controller is configured to apply a second program signal to a second portion of the array of memory cells that are to change from the second state to the first state.
3. The apparatus of claim 1 , wherein the controller is configured to apply a third program signal to a third portion of the array of memory cells that are to change from the first state to the second state.
4. The apparatus of claim 1 , wherein the first portion includes a reset signal.
5. The apparatus of claim 1 , wherein the second portion includes a set signal.
6. The apparatus of claim 1 , wherein the controller is configured to avoid applying any program signal to a fourth portion of the array of memory cells that are to remain in the second state.
7. An apparatus, comprising:
an array of memory cells; and
a controller configured to:
perform a pre-read operation to determine which memory cells of the array of memory cells will be programmed during a program operation; and
perform the program operation on the array of memory cells by:
applying a first program signal to a first portion of the array of memory cells that are to remain in a first state, wherein a first portion of the first program signal programs memory cells to a second state during a first time period and then a second portion of the first program signal programs the memory cells to the first state during a second time period, wherein the second time period is different from the first time period; and
applying a second program signal to a second portion of the array of memory cells that are to change from the second state to the first state.
8. The apparatus of claim 7 , wherein the controller is configured to apply a third program signal to a third portion of the array of memory cells that are to change from the first state to the second state.
9. The apparatus of claim 7 , wherein the first state is a set state.
10. The apparatus of claim 7 , wherein the second state is a reset state.
11. The apparatus of claim 7 , wherein the first program signal includes a selection-phase.
12. The apparatus of claim 11 , wherein the selection-phase includes an amount of time to prepare the first portion of the first program signal.
13. A method, comprising:
performing a pre-read operation to determine which memory cells of an array of memory cells will be programmed during a program operation;
performing the program operation on the array of memory cells by applying a first program signal to a first portion of the array of memory cells that are to remain in a first state, wherein a first portion of the first program signal programs memory cells to a second state during a first time period and then a second portion of the first program signal programs the memory cells to the first state during a second time period, wherein the second time period is different from the first time period.
14. The method of claim 13 , wherein performing the program operation includes applying a second program signal to a second portion of the array of memory cells that are to change from the second state to the first state.
15. The method of claim 13 , wherein performing the program operation includes applying a third program signal to a third portion of the array of memory cells that are to change from the first state to the second state.
16. The method of claim 13 , wherein the first program signal includes a set and reset signal.
17. The method of claim 14 , wherein the second program signal includes a set signal.
18. The method of claim 15 , wherein the third program signal includes a reset signal.
19. The method of claim 16 , wherein the first program signal is a single uninterrupted signal.