Interconnect structure having nanocrystalline graphene cap layer and electronic device including the interconnect structure
Provided are an interconnect structure and an electronic device including the interconnect structure. The interconnect structure includes a dielectric layer including at least one trench, a conductive wiring filling an inside of the at least one trench, and a cap layer on at least one surface of the conductive wiring. The cap layer includes nanocrystalline graphene. The nanocrystalline includes nano-sized crystals.
1. An interconnect structure comprising:
a dielectric layer including at least one trench;
a conductive wiring filling an inside of the at least one trench; and
a cap layer on at least one surface of the conductive wiring, the cap layer including nanocrystalline graphene, the nanocrystalline graphene including nano-sized crystals,
an upper surface of the dielectric layer being level with an upper surface of the conductive wiring, a lower surface of the cap layer, or both the upper surface of the conductive wiring and the lower surface of the cap layer, wherein
a ratio of carbon having an sp 2 bonding structure to total carbon in the nanocrystalline graphene is in a range from about 50% to about 99%,
the nanocrystalline graphene comprises hydrogen of 1 at % to 20 at %, and
a density of the nanocrystalline graphene is 1.6 g/cc to 2.1 g/cc.
2. The interconnect structure of claim 1 , wherein the nano-sized crystals have a size of about 0.5 nm to about 100 nm.
3. The interconnect structure of claim 1 , further comprising:
a substrate, wherein
the dielectric layer is on the substrate.
4. The interconnect structure of claim 3 , wherein the at least one trench in the dielectric layer includes at least one of:
a first trench in the dielectric layer that does not reach the substrate, or
a second trench in the dielectric layer that reaches the substrate.
5. The interconnect structure of claim 1 , wherein the conductive wiring includes one of a metal, a metal alloy, or a combination thereof.
6. The interconnect structure of claim 1 , further comprising:
a barrier layer, wherein
the barrier layer covers the conductive wiring in the at least one trench.
7. The interconnect structure of claim 6 , wherein the barrier layer exposes the upper surface of the conductive wiring.
8. The interconnect structure of claim 7 , wherein the cap layer covers the upper surface of the conductive wiring.
9. The interconnect structure of claim 8 , wherein the cap layer covers the upper surface of the barrier layer around the conductive wiring.
10. The interconnect structure of claim 9 , wherein the cap layer covers the upper surface of the dielectric layer around the barrier layer.
11. The interconnect structure of claim 8 , further comprising: a metal-containing layer between the conductive wiring and the cap layer.
12. The interconnect structure of claim 8 , wherein
the cap layer includes a first cap layer and a second cap layer,
the first cap layer covers the upper surface of the conductive wiring, and
the second cap layer is between the conductive wiring and the barrier layer.
13. The interconnect structure of claim 8 , wherein
the cap layer includes a first cap layer and second cap layer,
the first cap layer covers the upper surface of the conductive wiring, and
the second cap layer covers outer surfaces of the barrier layer in the at least one trench.
14. The interconnect structure of claim 6 , wherein the barrier layer covers an entire surface of the conductive wiring.
15. The interconnect structure of claim 14 , wherein
the cap layer includes a first cap layer and a second cap layer,
a first cap layer covering an upper surface of the barrier layer; and
a second cap layer covering one or more outer surfaces of the barrier layer in the at least one trench.
16. An electronic device comprising:
a substrate; and
an interconnect structure on the substrate,
the interconnect structure including a dielectric layer, a conductive wiring, and a cap layer,
the dielectric layer provided including at least one trench,
the conductive wiring filling an inside of the at least one trench, and
the cap layer on at least one surface of the conductive wiring, the cap layer including nanocrystalline graphene, the nanocrystalline graphene including nano-sized crystals,
an upper surface of the dielectric layer being level with an upper surface of the conductive wiring, a lower surface of the cap layer, or both the upper surface of the conductive wiring and the lower surface of the cap layer, wherein
a ratio of carbon having an sp 2 bonding structure to total carbon in the nanocrystalline graphene is in a range from about 50% to about 99%,
the nanocrystalline graphene comprises hydrogen of 1 at % to 20 at %, and
a density of the nanocrystalline graphene is 1.6 g/cc to 2.1 g/cc.
17. The electronic device of claim 16 , wherein
the interconnect structure further includes a barrier layer, and
the barrier layer covers the conductive wiring in the at least one trench.
18. An interconnect structure comprising:
a conductive wiring including a side surface, a bottom surface, and an upper surface;
a barrier layer surrounding the side surface and the bottom surface of the conductive wiring;
a cap layer on the upper surface of the conductive wiring, the cap layer including nanocrystalline graphene, the nanocrystalline graphene including nano-sized crystals; and
a dielectric layer surrounding the side surface of the conductive wiring,
an upper surface of the dielectric layer being level with an upper surface of the conductive wiring, a lower surface of the cap layer, or both the upper surface of the conductive wiring and the lower surface of the cap layer, wherein
a ratio of carbon having an sp 2 bonding structure to total carbon in the nanocrystalline graphene is in a range from about 50% to about 99%,
the nanocrystalline graphene comprises hydrogen of 1 at % to 20 at %, and
a density of the nanocrystalline graphene is 1.6 g/cc to 2.1 g/cc.
19. The interconnect structure of claim 18 , wherein
a width of the cap layer is different than a width of the conductive wiring.
20. The interconnect structure of claim 18 , wherein
a width of the cap layer and a width of the conductive wiring are equal.
21. The interconnect structure of claim 18 , wherein
the cap layer surrounds the side surface of the conductive wiring.
22. The interconnect structure of claim 18 , further comprising:
the barrier layer is between the side surface of the conductive wiring and the dielectric layer, and
a thickness of the barrier layer is less than or equal to a thickness of the dielectric layer.