IP Library Granted Patent US 10,566,070
Granted Patent B2
US 10,566,070 · App. 16/216,948 · Granted Feb 18, 2020

Electronic device with a fuse read mechanism

Inventors: Raghukiran Sreeramaneni (Frisco, TX); William J. Wilcox (Meridian, ID); Girish N. Cherussery (Boise, ID)
Assignee: Micron Technology, Inc.
G11C17/18G11C17/16
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Quick Facts
Patent No.
US 10,566,070
App. No.
16/216,948
Granted
Feb 18, 2020
Kind
B2
Abstract

A method of operating an electronic device includes: precharging a fuse read node to an intermediate voltage less than an input voltage, wherein the fuse read node connects a fuse array and a fuse read circuit, the fuse array including a fuse cell configured to store information and the fuse read circuit configured to read the stored information; connecting the fuse cell to the fuse read node for reading the information; and determining, with the fuse read circuit, the information from the fuse cell based on changes to the intermediate voltage at the fuse read node.

Claims (36)

1. A method of operating an electronic device, comprising:

precharging a fuse read node to an intermediate voltage using an intermediate precharging device having an input and an output directly connected to the fuse read node, wherein:

the intermediate voltage is less than an input voltage,

the fuse read node connects a fuse array and a fuse read circuit, and

the fuse array includes a fuse cell configured to store information and the fuse read circuit configured to read the stored information;

connecting the fuse cell to the fuse read node for reading the information; and

determining, with the fuse read circuit, the information from the fuse cell based on changes to the intermediate voltage at the fuse read node.

2. The method of claim 1 , wherein precharging includes charging the fuse read node to the intermediate voltage during an enable duration before reading the information.

3. The method of claim 2 , further comprising adjusting a fuse read voltage at the fuse read node based on a connection between the fuse read node and the fuse cell after precharging the fuse read node to the intermediate voltage.

4. The method of claim 3 , wherein adjusting the fuse read voltage includes reducing the fuse read voltage from the intermediate voltage based on a fuse setting of the fuse cell.

5. The method of claim 3 , wherein adjusting the fuse read voltage includes increasing the fuse read voltage from the intermediate voltage based on a fuse setting of the fuse cell.

6. The method of claim 2 , wherein determining the information includes detecting a fuse read voltage at the fuse read node after an updated duration, wherein the updated duration is less than a reading duration associated with precharging the fuse read node to the input voltage.

7. The method of claim 1 , wherein:

precharging the fuse read node includes precharging the fuse read node to the intermediate voltage closer to a reading threshold than the input voltage, wherein the reading threshold is a trip point of an intermediate inverter configured to invert a voltage state at the fuse read node; and

determining the information includes comparing a voltage at the fuse read node to the reading threshold.

8. The method of claim 1 , wherein the intermediate precharging device comprises an inverter.

9. The method of claim 1 , wherein:

the fuse array includes one or more sets of anti-fuses located at a specific portion within the electronic device; and

connecting the fuse cell includes connecting an anti-fuse to the fuse read node, wherein the anti-fuse includes a setting circuit configured to provide an electrical open or a first resistance level when it is not programmed and provide an electrical short or a second resistance level that is lower than the first resistance level when it is programmed or in a fuse-blown setting.

10. The method of claim 1 , wherein precharging the fuse read node includes connecting the fuse read node to the input voltage through the intermediate precharging device, wherein the intermediate precharging device is configured to output the intermediate voltage from the input voltage.

11. An electronic device, comprising:

a fuse array including a fuse cell configured to store information; and

a fuse read circuit connected to the fuse array at a fuse read node, the fuse read circuit including an intermediate precharging device that is configured to adjust a fuse read voltage at the fuse read node to an intermediate voltage less than an input voltage, wherein:

the intermediate precharging device includes an input and an output directly connected to the fuse read node, and

the fuse read circuit is configured to read the information stored in the fuse cell based on changes in the fuse read voltage from the intermediate voltage from connecting the fuse read node to the fuse cell.

12. The electronic device of claim 11 , wherein the intermediate precharging device comprises an inverter.

13. The electronic device of claim 12 , wherein:

the intermediate precharging device is configured to precharge the fuse read node to the intermediate voltage closer to a reading threshold than the input voltage; and

the fuse read circuit is configured to read the information based on comparing the fuse read voltage to the reading threshold.

14. The electronic device of claim 11 , wherein the fuse cell includes an anti-fuse configured to provide an electrical open or a first resistance level when it is not programmed and provide an electrical short or a second resistance level that is lower than the first resistance level when it is programmed or in a fuse-blown setting.

15. The electronic device of claim 14 , wherein the anti-fuse is configured to reduce the fuse read voltage below the intermediate voltage when it is programmed.

16. The electronic device of claim 14 , wherein the anti-fuse is configured to increase the fuse read voltage above the intermediate voltage when it is not programmed.

17. The electronic device of claim 14 , wherein the anti-fuse includes a fuse transistor and an oxide layer, wherein the fuse transistor is configured to select the fuse cell and the oxide layer is configured to provide the first resistance level or the second resistance level based on programming.

18. The electronic device of claim 11 , further comprising an input selection circuit configured to set the input voltage for adjusting the fuse read voltage after precharging to the intermediate voltage, wherein the input voltage is coupled to the fuse read node through the fuse cell.

19. The electronic device of claim 11 , further comprising a fuse selection circuit configured to electrically connect the fuse cell to the fuse read circuit.

20. The electronic device of claim 11 , wherein the intermediate precharging device is connected to the input voltage and is configured to output the intermediate voltage reduced from the input voltage.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 15, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051026/0568 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050718/0764 →
SUPPLEMENT NO. 11 TO PATENT SECURITY AGREEMENT Recorded Jan 16, 2019
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048082/0860 →
SUPPLEMENT NO. 2 TO PATENT SECURITY AGREEMENT Recorded Jan 16, 2019
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 048082/0889 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2018
From: SREERAMANENI, RAGHUKIRAN; WILCOX, WILLIAM J.; CHERUSSERY, GIRISH N.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047748/0521 →