Package assembly
The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure includes a bump structure disposed on a first substrate and a molding compound in physical contact with the bump structure. The bump structure protrudes from the molding compound. A conductive region is on a second substrate and contacts the bump structure. A no-flow underfill (NUF) material is vertically between the molding compound and the second substrate and laterally surrounds the bump structure. The NUF material is separated from the molding compound.
1. An integrated chip structure, comprising:
a bump structure disposed on a first substrate;
a molding compound in physical contact with the bump structure, wherein the bump structure protrudes from the molding compound;
a conductive region on a second substrate and contacting the bump structure;
a no-flow underfill (NUF) material vertically between the molding compound and the second substrate and laterally surrounding the bump structure, wherein the NUF material is separated from the molding compound, and wherein the NUF material has a curved upper surface facing away from the second substrate; and
a mask layer disposed between the NUF material and the second substrate, wherein the curved upper surface of the NUF material has a first end contacting the mask layer and a second end contacting the bump structure.
2. The integrated chip structure of claim 1 , wherein the bump structure protrudes outward from a top of the NUF material towards the first substrate.
3. The integrated chip structure of claim 1 , wherein the NUF material comprises an epoxy resin.
4. The integrated chip structure of claim 1 , wherein a top of the NUF material contacts a side of the bump structure at a position that is laterally set back from an outermost boundary of the bump structure.
5. The integrated chip structure of claim 1 , wherein the bump structure continuously extends from above a top of the molding compound to below a bottom of the molding compound.
6. The integrated chip structure of claim 1 , wherein the molding compound has a lower surface facing the curved upper surface of the NUF material, the lower surface extending past outermost edges of the NUF material in opposing directions.
7. A package assembly, comprising:
a conductive bump on a first substrate;
a solder mask on a second substrate;
a no-flow underfill layer disposed along sidewalls and an upper surface of the solder mask;
wherein the conductive bump extends from a conductive region on the second substrate to over a top of the no-flow underfill layer; and
a molding compound disposed on the first substrate and physically contacting sides of the conductive bump, wherein the conductive bump protrudes outward from the molding compound towards the conductive region.
8. The package assembly of claim 7 , wherein the conductive bump has a first curved surface that intersects a second curved surface of the no-flow underfill layer.
9. The package assembly of claim 7 , wherein the first substrate comprises a semiconductor die and the second substrate comprises a printed circuit board.
10. The package assembly of claim 7 , wherein the no-flow underfill layer contacts one or more surfaces of the conductive region.
11. The package assembly of claim 7 , wherein a largest height of the conductive bump that the molding compound physically contacts is in a range of between approximately one-fourth and approximately three-fourths of a total height of the conductive bump.
12. The package assembly of claim 7 , wherein the no-flow underfill layer comprises underfill and flux.
13. A package assembly, comprising:
a conductive bump on a first substrate;
a no-flow underfill layer on a second substrate, wherein the no-flow underfill layer has a convex curved surface extending from a conductive region on the second substrate to a top of the no-flow underfill layer; and
wherein the conductive bump comprises a curved conductive surface that directly contacts an entirety of the convex curved surface of the no-flow underfill layer.
14. The package assembly of claim 13 , wherein an outer edge of the conductive region is directly below the convex curved surface of the no-flow underfill layer.
15. The package assembly of claim 13 , further comprising:
a molding compound disposed on the first substrate and contacting sides of the conductive bump, wherein the conductive bump protrudes outward from a bottom surface of the molding compound towards the conductive region.
16. The package assembly of claim 15 , wherein the conductive bump continuously extends from above a top surface of the molding compound to below the bottom surface of the molding compound.
17. The package assembly of claim 15 , wherein the bottom surface of the molding compound extends past the no-flow underfill layer in opposing directions.
18. The integrated chip structure of claim 1 , wherein the NUF covers an upper surface of the second substrate.
19. The package assembly of claim 7 , wherein the molding compound is separated from the no-flow underfill layer.
20. The package assembly of claim 13 , further comprising:
a solder resist layer disposed on the second substrate, wherein an upper surface and sidewalls of the solder resist layer are covered by the no-flow underfill layer.