Memory module interfaces
The present disclosure includes apparatuses and methods related to memory module interfaces. A memory module, which may include volatile memory or nonvolatile memory, or both, may be configured to communicate with a host device via one interface and to communicate with another memory module using a different interface. Memory modules may thus be added or removed from a system without impacting a PCB-based bus to the host, and memory modules may communicate with one another without accessing a bus to the host. The host interface may be configured according to one protocol or standard, and other interfaces between memory modules may be configured according to other protocols or standards.
1. An apparatus, comprising:
a first memory module that comprises one or more types of memory media, including at least one non-volatile memory array;
a first interface coupled to the non-volatile memory array and couplable to a host, the first interface configured to transfer data or commands, or both, between the first memory module and the host, wherein the first interface is couplable to the host via a first bus located on a printed circuitry board (PCB); and
a second interface coupled to the non-volatile memory array and couplable to a second memory module, the second interface configured to transfer data or commands, or both, between the first memory module and the second memory module, wherein the second memory module is couplable only to the first memory module via a second bus that is located off the PCB.
2. The apparatus of claim 1 , wherein the memory module comprises a DRAM array coupled to the non-volatile memory array.
3. The apparatus of claim 1 , wherein the non-volatile memory array comprises 3D XPoint memory.
4. The apparatus of claim 1 , wherein the non-volatile memory array comprises NAND.
5. The apparatus of claim 1 , wherein the first interface is couplable to the host via the first bus configured for NVDIMM-P.
6. The apparatus of claim 5 , wherein the first bus is located on the PCB and is couplable to a third interface on the host.
7. The apparatus of claim 1 , wherein the second interface is couplable to the second memory module via the second bus configured for NVDIMM-P and/or another interface.
8. A system, comprising:
a first memory module with a first interface and a second interface, wherein comprises the first memory module includes one or more types of memory media, including at least one non-volatile memory array;
a host including a third interface, wherein the host is coupled to the first memory module via the first interface, the third interface, and a first bus and wherein the first bus is located on a printed circuitry board (PCB); and
a second memory module including a fourth interface, wherein the second memory module is coupled only to the first memory module, wherein the second memory module is coupled to the first memory module via the second interface, the fourth interface, and a second bus, and wherein the second bus is located off the PCB; and wherein the first memory module is configured to execute commands from the host to transfer data between the first memory module, the second memory module, and the host.
9. The system of claim 8 , wherein the system is configured to transfer data between the host and the first memory module via the first interface, the third interface, and the first bus.
10. The system of claim 8 , wherein the system is configured to transfer data between the first memory module and the second memory module via the second interface, the fourth interface, and the second bus.
11. The system of claim 8 , wherein the system is configured to transfer data between the host and the first memory module via the first interface, the third interface, and the first bus while transferring data between the first memory module and the second memory module via the second interface, the fourth interface, and the second bus.
12. The system of claim 8 , further comprising the second memory module including a fifth interface and a third memory module including a sixth interface, wherein the second memory module is coupled to the third memory module via the fifth interface, the sixth interface, and a third bus.
13. The system of claim 12 , wherein the system is configured to transfer between the second memory module and the third memory module via the fifth interface, the sixth interface, and the third bus.
14. The system of claim 8 , wherein the first memory module is an NVDIMM-P and the second memory module includes DRAM.
15. The system of claim 8 , wherein the first memory module is an NVDIMM-P and the second memory module includes storage class memory.
16. A method, comprising:
transferring a first portion of data between a host and a first memory module via a first interface, a second interface, and a first bus, wherein the first memory module includes one or more types of memory media, including at least one non-volatile memory array, and wherein the first bus is located on a printed circuitry board (PCB); and
transferring a second portion of data between the first memory module and a second memory module via a third interface, a fourth interface, and a second bus, wherein the second bus is located off the PCB and wherein the second memory module is coupled only to the first memory module.
17. The method of claim 16 , further including transferring the first portion of data while transferring the second portion of data.
18. The method of claim 16 , wherein transferring the first portion of data includes executing commands from the host.
19. The method of claim 16 , wherein transferring the second portion of data includes executing commands from the host.
20. The method of claim 16 , wherein transferring the second portion of data includes executing commands from the first memory module.
21. The method of claim 16 , wherein transferring the second portion of data includes executing commands from the second memory module.