Circuit and method for controlling a crystal oscillator
A crystal oscillator circuit that can be controlled for fast start-up and for efficient operation is disclosed. The control includes adjusting a voltage applied to a body terminal of a transistor in order to control the amplification of the crystal oscillator. The amplification can be increased, relative to a motional resistance of the crystal oscillator, at start-up to reduce a start-up time necessary for oscillation. The amplification can also be decreased in order to maintain oscillation after start-up more efficiently. In some implementations, the transistor for control is a fully depleted silicon on insulator (FDSOI) transistor that accommodates a wide range of body bias voltages.
1. An oscillator circuit, comprising:
an adjustable current mirror, including a first transistor and a second transistor, wherein a current through the second transistor is an output of the adjustable current mirror, the current through the second transistor controllable by a body bias voltage applied to a body terminal of the second transistor;
a crystal oscillator coupled to the output of the adjustable current mirror and including an amplifier in a feedback loop with a crystal resonator, the amplifier having a transconductance gain corresponding to the current through the second transistor; and
a body bias circuit, coupled to the crystal oscillator and the adjustable current mirror, the body bias circuit configured to apply the body bias voltage to the body terminal of the second transistor during a start-up period to increase the current through the second transistor.
2. The oscillator circuit according to claim 1 , further comprising a bias current source coupled to the first transistor that generates a current through the first transistor.
3. The oscillator circuit according to claim 1 , wherein the second transistor is a fully depleted silicon on insulator (FDSOI) technology transistor or a silicon on insulator (SOI) technology transistor.
4. The oscillator circuit according to claim 3 , wherein a body terminal of the first transistor is connected to a supply voltage and the body terminal of the second transistor is coupled to the body bias circuit so that during the start-up period the current through the first transistor is not equal to the current through the second transistor.
5. The oscillator circuit according to claim 3 , wherein the amplifier is a transistor is biased by the current through the second transistor of the adjustable current mirror to provide a first transconductance during the start-up period and a second transconductance after the start-up period.
6. The oscillator circuit according to claim 5 , wherein the first transconductance is higher than the second transconductance, and wherein the first transconductance and the second transconductance are higher than a motional resistance of the crystal resonator.
7. The oscillator circuit according to claim 1 , wherein the body bias circuit includes:
a body bias control, coupled to the output of the crystal oscillator, that includes at least one flip-flop configured as a divide-by circuit to count cycles of oscillation to determine the start-up period.
8. The oscillator circuit according to claim 7 , wherein the body bias control includes:
a body bias generator, coupled to the body bias control, and configured to output the body bias voltage according to the start-up period determined by the body bias control.
9. The oscillator circuit according to claim 8 , wherein the body bias generator includes at least one logic gate and a logic driver, the body bias generator configured by the output of the body bias control to:
apply a first logic level voltage to the body terminal of the second transistor during the start-up period, and
apply a second logic level voltage to the body terminal of the second transistor after the start-up period.
10. The oscillator circuit according to claim 9 , wherein the body bias generator includes a diode-connected transistor and a switch network, the switch network configured by the output of the body bias control to:
bias the diode-connected transistor so that a first body bias voltage is applied during the start-up period; and
unbias the diode-connected transistor so that a second body bias voltage applied after the start-up period.
11. The oscillator circuit according to claim 8 , wherein the body bias generator includes a filter that is configured to reduce noise on the body terminal after the start-up period.
12. A method for controlling a crystal oscillator, comprising:
determining a state of the crystal oscillator;
adjusting, based on the determined state, a body bias voltage at a body terminal of a transistor of an adjustable current mirror to control a current through the transistor of the adjustable current mirror; and
biasing an amplifier of the crystal oscillator using the current through the transistor of the adjustable current mirror to adjust a transconductance gain of the amplifier based on the state.
13. The method for controlling a crystal oscillator according to claim 12 , further comprising:
determining that the crystal oscillator is in a start-up state;
adjusting the body bias voltage at the body terminal of the transistor of the adjustable current mirror to increase the current through the transistor of the adjustable current mirror; and
biasing the amplifier of the crystal oscillator using the increased current to increase the transconductance gain of the amplifier.
14. The method for controlling a crystal oscillator according to claim 12 , further comprising:
determining that the crystal oscillator is not in a start-up state;
adjusting the body bias voltage at the body terminal of the transistor of the adjustable current mirror to decrease the current through the transistor of the adjustable current mirror; and
biasing the amplifier of the crystal oscillator using the decreased current through the transistor of the adjustable current mirror to decrease the transconductance gain of the amplifier.
15. The method for controlling a crystal oscillator according to claim 12 , wherein the transistor of the adjustable current mirror is a fully depleted silicon on insulator (FDSOI) transistor or a silicon on insulator (SOI) transistor.
16. The method for controlling a crystal oscillator according to claim 12 , wherein an oscillation of the crystal oscillator is at any frequency in a kilohertz to megahertz range.
17. The method for controlling a crystal oscillator according to claim 12 , wherein the determining a state of the crystal oscillator includes counting a number of cycles in an oscillating signal from the crystal oscillator.
18. The method for controlling a crystal oscillator according to claim 12 , wherein:
when the transistor of the adjustable current mirror is a PMOS transistor, the adjusting includes reducing the body bias voltage at the body terminal from a supply voltage to increase the current through the transistor of the adjustable current mirror; and
when the transistor of the adjustable current mirror is an NMOS transistor, the adjusting includes increasing the body bias voltage at the body terminal from a ground voltage to increase the current through the transistor of the adjustable current mirror.
19. A crystal oscillator comprising:
a crystal resonator in a feedback loop with an amplifier, the amplifier being biased by a circuit including:
an adjustable current mirror including a transistor configured to provide a first current to the amplifier that is sufficient to start oscillation, the first current sufficient to start oscillation being based on a first voltage applied to a body terminal of the transistor; and
a body bias circuit configured to apply a second voltage to the body terminal of the transistor after oscillation has started, the second voltage configuring the transistor to provide a second current to the amplifier that is sufficient to maintain oscillation, the first current sufficient to start oscillation higher than the second current sufficient to maintain oscillation.
20. The crystal oscillator according to claim 19 , wherein the transistor is a fully depleted silicon on insulator (FDSOI) transistor or a silicon on insulator (SOI) transistor.