IP Library Granted Patent US 10,901,658
Granted Patent B2
US 10,901,658 · App. 16/235,664 · Granted Jan 26, 2021

Host adaptive memory device optimization

Inventors: Nadav Grosz (Broomfield, CO); David Aaron Palmer (Boise, ID)
Assignee: Micron Technology, Inc.
G06F3/0659G06F3/0604G06F3/0679
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,901,658
App. No.
16/235,664
Granted
Jan 26, 2021
Kind
B2
Abstract

Devices and techniques for host adaptive memory device optimization are provided. A memory device can maintain a host model of interactions with a host. A set of commands from the host can be evaluated to create a profile of the set of commands. The profile can be compared to the host model to determine an inconsistency between the profile and the host model. An operation of the memory device can then be modified based on the inconsistency.

Claims (40)

1. A memory device for host adaptive memory device optimization, the memory device comprising:

storage to maintain a host model of interactions with a host, wherein the interactions with the host are memory device commands received from the host, and wherein the host model applies to all memory device commands of a same type received from the host; and

processing circuitry to:

evaluate a set of commands from the host to create a profile of the set of commands, wherein, to evaluate the set of commands, the processing circuitry is configured to measure a characteristic for commands in the set of commands, wherein the characteristic is one of data size, pendency interval, inter-command interval, rate of arrival, depth of command queue;

compare the profile to the host model to determine an inconsistency between the profile and the host model; and

modify an operation of the memory device based on the inconsistency, wherein, to modify the operation of the memory device based on the inconsistency, the processing circuitry is configured to change at least one of a host timeout interval, a write cache size, a flush frequency, a block alignment parameter, garbage collection frequency, or a wear leveling parameter.

2. The memory device of claim 1 , wherein, to compare the profile to the host model, the processing circuitry is configured to:

retrieve representation of the characteristic of a single command from the host model;

compare a respective characteristic of a subset of commands from the set of commands to the representation of the characteristic; and

determine that the respective characteristic is larger or smaller than the representation characteristic by more than a threshold to produce the inconsistency.

3. The memory device of claim 2 , wherein the representation of the characteristic is an average.

4. The memory device of claim 2 , wherein the subset of commands corresponds to a single type of command.

5. The memory device of claim 4 , wherein the type of command is one of read, write, flush, erase, move, or garbage collection.

6. The memory device of claim 1 , wherein the set of commands are commands in a command queue for the memory device, and wherein the inconsistency is a difference between a depth of the command queue and an average depth of the command queue stored in the host model.

7. A method for host adaptive memory device optimization, the method comprising:

maintaining, by a memory device, a host model of interactions with a host, wherein the interactions with the host are memory device commands received from the host, and wherein the host model applies to all memory device commands of a same type received from the host;

evaluating a set of commands from the host to create a profile of the set of commands, wherein evaluating the set of commands includes measuring a characteristic for commands in the set of commands, wherein the characteristic is one of data size, pendency interval, inter-command interval, rate of arrival, depth of command queue;

comparing the profile to the host model to determine an inconsistency between the profile and the host model; and

modifying an operation of the memory device based on the inconsistency, wherein modifying the operation of the memory device based on the inconsistency includes changing at least one of a host timeout interval, a write cache size, a flush frequency, a block alignment parameter, garbage collection frequency, or a wear leveling parameter.

8. The method of claim 7 , wherein comparing the profile to the host model includes:

retrieving representation of the characteristic of a single command from the host model;

comparing a respective characteristic of a subset of commands from the set of commands to the representation of the characteristic; and

determining that the respective characteristic is larger or smaller than the representation of the characteristic by more than a threshold to produce the inconsistency.

9. The method of claim 8 , wherein the representation of the characteristic is an average.

10. The method of claim 8 , wherein the subset of commands corresponds to a single type of command.

11. The method of claim 10 , wherein the type of command is one of read, write, flush, erase, move, or garbage collection.

12. The method of claim 7 , wherein the set of commands are commands in a command queue for the memory device, and wherein the inconsistency is a difference between a depth of the command queue and an average depth of the command queue stored in the host model.

13. A non-transitory machine readable medium including instructions for host adaptive memory device optimization, the instructions, when executed by processing circuitry, cause the processing circuitry to perform operations comprising:

maintaining, by a memory device, a host model of interactions with a host, wherein the interactions with the host are memory device commands received from the host, and wherein the host, model applies to all memory device commands of a same type received from the host;

evaluating a set of commands from the host to create a profile of the set of commands, wherein evaluating the set of commands includes measuring a characteristic for commands in the set of commands, wherein the characteristic is one of data size, pendency interval, inter-command interval, rate of arrival, depth of command queue;

comparing the profile to the host model to determine an inconsistency between the profile and the host model; and

modifying an operation of the memory device based on the inconsistency, wherein modifying the operation of the memory device based on the inconsistency includes changing at least one of a host timeout interval, a write cache size, a flush frequency, a block alignment parameter, garbage collection frequency, or a wear leveling parameter.

14. The non-transitory machine readable medium of claim 13 , wherein comparing the profile to the host model includes:

retrieving representation of the characteristic of a single command from the host model;

comparing a respective characteristic of a subset of commands from the set of commands to the representation of the characteristic; and

determining that the respective characteristic is larger or smaller than the representation of the characteristic h more than a threshold to produce the inconsistency.

15. The non-transitory machine readable medium of claim 14 , wherein the representation of the characteristic is an average.

16. The non-transitory machine readable medium of claim 14 , wherein the subset of commands corresponds to a single type of command.

17. The non-transitory machine readable medium of claim 16 , wherein the type of command is one of read, write, flush, erase, move, or garbage collection.

18. The non-transitory machine readable medium of claim 13 , wherein the set of commands are commands in a command queue for the memory device, and wherein the inconsistency is a difference between a depth of the command queue and an average depth of the command queue stored in the host model.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2020
From: GROSZ, NADAV; PALMER, DAVID AARON
To: MICRON TECHNOLOGY, INC.
Reel/Frame 052406/0368 →
RELEASE OF SECURITY INTEREST Recorded Nov 15, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051041/0317 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050724/0392 →
SUPPLEMENT NO. 12 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048948/0677 →
SUPPLEMENT NO. 3 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 048951/0902 →