ACCELERATED MEMORY DEVICE TRIM INITIALIZATION
Devices and techniques for accelerated memory device trim initialization are described herein. An initialization of a memory device can be started by the memory device. An accelerated trim command can be received at the memory device from a controller. The memory device can refrain from setting a trim in response to receipt of the accelerated trim command. Here, the trim is expected to be set by the controller. The memory device can then complete the initialization after the trim is set by the controller.
1 . A memory device for accelerated memory device trim initialization, the memory device comprising:
an interface to receive an accelerated trim command from a controller; and
processing circuitry to:
start an initialization of the memory device;
refrain from setting a trim in response to receipt of the accelerated trim command, the trim being set by the controller; and
complete, after the trim is set by the controller, the initialization of the memory device.
2 . The memory device of claim 1 , wherein the accelerated trim command is one of two types of accelerated trim commands, a first type being a partial type and a second type being a complete type.
3 . The memory device of claim 2 , wherein the accelerated trim command is a complete type, and wherein, to refrain from setting a trim, the processing circuitry is configured to refrain from setting all trims.
4 . The memory device of claim 2 , wherein the accelerated trim command is a partial type, and wherein, to refrain from setting a trim, the processing circuitry is configured to refrain from setting a subset of all trims.
5 . The memory device of claim 4 , wherein the subset of all trims are trims that are not specific to the memory device.
6 . The memory device of claim 5 , wherein the processing circuitry is configured to load trims specific to the memory device.
7 . The memory device of claim 4 , wherein the interface is configured to receive:
a second accelerated trim command from the controller, the second accelerated trim command being a partial type; and
a third accelerated trim command in response to a failure of the controller to set a second trim; and
wherein the processing circuitry is configured to:
start a second initialization of the memory device;
refrain from setting the second trim in response to receipt of the second accelerated trim command;
set the second trim in response to receipt of the third accelerated trim command; and
complete, after the second trim is set, the second initialization of the memory device.
8 . The memory device of claim 1 , wherein the interface is configured to receive a trim read command, and wherein the processing circuitry is configured to provide trim data stored on the memory device in response to receipt of the trim read command.
9 . A method for accelerated memory device trim initialization, the method comprising:
starting, at a memory device, an initialization of the memory device;
receiving, at the memory device, an accelerated trim command from a controller;
refraining, by the memory device, from setting a trim in response to receipt of the accelerated trim command, the trim being set by the controller; and
completing, by the memory device after the trim is set by the controller, the initialization of the memory device.
10 . The method of claim 9 , wherein the accelerated trim command is one of two types of accelerated trim commands, a first type being a partial type and a second type being a complete type.
11 . The method of claim 10 , wherein the accelerated trim command is a complete type, and wherein refraining from setting a trim includes refraining from setting all trims.
12 . The method of claim 10 , wherein the accelerated trim command is a partial type, and wherein refraining from setting a trim includes refraining from setting a subset of all trims.
13 . The method of claim 12 , wherein the subset of all trims are trims that are not specific to the memory device.
14 . The method of claim 13 , comprising, loading, by the memory device, trims specific to the memory device.
15 . The method of claim 12 , comprising:
starting, at the memory device, a second initialization of the memory device;
receiving, at the memory device, a second accelerated trim command from the controller, the second accelerated trim command being a partial type;
refraining, by the memory device, from setting a second trim in response to receipt of the second accelerated trim command;
receiving, by the memory device, a third accelerated trim command in response to a failure of the controller to set the second trim;
setting, by the memory device, the second trim in response to receipt of the third accelerated trim command; and
completing, by the memory device after the second trim is set, the second initialization of the memory device.
16 . The method of claim 9 , comprising:
receiving, by the memory device, a trim read command; and
providing trim data stored on the memory device in response to receipt of the trim read command.
17 . A machine readable medium including instructions for accelerated memory device trim initialization, the instructions, when executed by processing circuitry, cause the processing circuitry to perform operations comprising:
starting, at a memory device, an initialization of the memory device;
receiving, at the memory device, an accelerated trim command from a controller;
refraining, by the memory device, from setting a trim in response to receipt of the accelerated trim command, the trim being set by the controller; and
completing, by the memory device after the trim is set by the controller, the initialization of the memory device.
18 . The machine readable medium of claim 17 , wherein the accelerated trim command is one of two types of accelerated trim commands, a first type being a partial type and a second type being a complete type.
19 . The machine readable medium of claim 18 , wherein the accelerated trim command is a complete type, and wherein refraining from setting a trim includes refraining from setting all trims.
20 . The machine readable medium of claim 18 , wherein the accelerated trim command is a partial type, and wherein refraining from setting a trim includes refraining from setting a subset of all trims.
21 . The machine readable medium of claim 20 , wherein the subset of all trims are trims that are not specific to the memory device.
22 . The machine readable medium of claim 21 , wherein the operations comprise loading, by the memory device, trims specific to the memory device.
23 . The machine readable medium of claim 20 , wherein the operations comprise:
starting, at the memory device, a second initialization of the memory device;
receiving, at the memory device, a second accelerated trim command from the controller, the second accelerated trim command being a partial type;
refraining, by the memory device, from setting a second trim in response to receipt of the second accelerated trim command;
receiving, by the memory device, a third accelerated trim command in response to a failure of the controller to set the second trim;
setting, by the memory device, the second trim in response to receipt of the third accelerated trim command; and
completing, by the memory device after the second trim is set, the second initialization of the memory device.
24 . The machine readable medium of claim 17 , wherein the operations comprise:
receiving, by the memory device, a trim read command; and
providing trim data stored on the memory device in response to receipt of the trim read command.