IP Library › Granted Patent US 10,586,842
Granted Patent B2
US 10,586,842 · App. 16/240,834 · Granted Mar 10, 2020

Display device and semiconductor device

Inventor: Mizuki Sato (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/3276H01L27/124H01L27/1222H01L27/1251H01L27/1255H01L27/156H01L27/3258H01L27/3262H01L27/3265H01L29/786H01L29/78654H01L29/78663H01L29/78672H01L29/78696G02F1/1362H01L27/10805H01L27/3244
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Quick Facts
Patent No.
US 10,586,842
App. No.
16/240,834
Granted
Mar 10, 2020
Kind
B2
Abstract

An object is to provide a display device with a high aperture ratio or a semiconductor device in which the area of an element is large. A channel formation region of a TFT with a multi-gate structure is provided under a wiring that is provided between adjacent pixel electrodes (or electrodes of an element). In addition, a channel width direction of each of a plurality of channel formation regions is parallel to a longitudinal direction of the pixel electrode. In addition, when a channel width is longer than a channel length, the area of the channel formation region can be increased.

Claims (57)

1. A display device comprising:

a first transistor;

a second transistor;

a first wiring, the first wiring electrically connected to one of a source and a drain of the first transistor;

a second wiring, the second wiring electrically connected to one of a source and a drain of the second transistor; and

an electroluminescent element, the electroluminescent element electrically connected to the other of the source and the drain of the first transistor,

wherein a channel formation region of the first transistor comprises a region capable of flowing a carrier in a first direction,

wherein a semiconductor layer comprising the channel formation region of the first transistor has a curved portion,

wherein the first wiring is configured to transmit a current that flows into the electroluminescent element via the first transistor,

wherein the first wiring comprises a region overlapping with the semiconductor layer,

wherein a longitudinal direction of the first wiring intersects with the first direction,

wherein the second transistor is configured to transmit a signal of the second wiring to the first transistor,

wherein the second wiring comprises a region overlapping with the semiconductor layer,

wherein the channel formation region of the first transistor comprises crystalline silicon, and

wherein a channel formation region of the second transistor comprises crystalline silicon.

2. The display device according to claim 1 , wherein the curved portion is an U-shaped curved portion.

3. The display device according to claim 1 , wherein a pixel electrode of the electroluminescent element includes a rounded corner.

4. The display device according to claim 1 , wherein a gate of the first transistor is capable of being one electrode of a capacitor.

5. The display device according to claim 4 , wherein the capacitor and the semiconductor layer of the first transistor overlap each other.

6. The display device according to claim 4 , wherein the first wiring is capable of being the other electrode of the capacitor.

7. The display device according to the claim 1 , wherein the first transistor has a multi-gate structure.

8. The display device according to claim 1 , wherein the other of the source and the drain of the second transistor is electrically connected to a gate of the first transistor.

9. An electronic device comprising the display device according to claim 1 .

10. The display device according to claim 1 ,

wherein the first wiring is located between adjacent pixel electrodes,

wherein a channel width direction of the channel formation region of the first transistor is parallel to a longitudinal direction of one of the adjacent pixel electrodes, and

wherein a channel width of the channel formation region of the first transistor is longer than a channel length of the channel formation region of the first transistor.

11. The display device according to claim 1 , wherein a gate of the first transistor is directly connected to the other of the source and the drain of the second transistor in a circuit diagram.

12. A display device comprising:

a first transistor;

a second transistor;

a first wiring, the first wiring electrically connected to one of a source and a drain of the first transistor;

a second wiring, the second wiring electrically connected to one of a source and a drain of the second transistor; and

an electroluminescent element, the electroluminescent element electrically connected to the other of the source and the drain of the first transistor,

wherein a channel formation region of the first transistor comprises a region capable of flowing a carrier in a first direction,

wherein a semiconductor layer comprising the channel formation region of the first transistor has a curved portion,

wherein the first wiring is configured to transmit a current that flows into the electroluminescent element via the first transistor,

wherein the first wiring comprises a region overlapping with the semiconductor layer,

wherein a longitudinal direction of the first wiring intersects with the first direction,

wherein the second transistor is configured to transmit a signal of the second wiring to the first transistor,

wherein the second wiring comprises a region overlapping with the semiconductor layer,

wherein a longitudinal direction of the second wiring intersects with the first direction,

wherein the channel formation region of the first transistor comprises crystalline silicon, and

wherein a channel formation region of the second transistor comprises crystalline silicon.

13. The display device according to claim 12 , wherein the curved portion is an U-shaped curved portion.

14. The display device according to claim 12 , wherein a pixel electrode of the electroluminescent element includes a rounded corner.

15. The display device according to claim 12 , wherein a gate of the first transistor is capable of being one electrode of a capacitor.

16. The display device according to claim 15 , wherein the capacitor and the semiconductor layer of the first transistor overlap each other.

17. The display device according to claim 15 , wherein the first wiring is capable of being the other electrode of the capacitor.

18. The display device according to the claim 12 , wherein the first transistor has a multi-gate structure.

19. The display device according to claim 12 , wherein the other of the source and the drain of the second transistor is electrically connected to a gate of the first transistor.

20. An electronic device comprising the display device according to claim 12 .

21. The display device according to claim 12 ,

wherein the first wiring is located between adjacent pixel electrodes,

wherein a channel width direction of the channel formation region of the first transistor is parallel to a longitudinal direction of one of the adjacent pixel electrodes, and

wherein a channel width of the channel formation region of the first transistor is longer than a channel length of the channel formation region of the first transistor.

22. The display device according to claim 12 , wherein a gate of the first transistor is directly connected to the other of the source and the drain of the second transistor in a circuit diagram.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 7, 2019
From: SATO, MIZUKI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 047919/0444 →
Priority Claims (1)
JP 2006-199292 · Jul 21, 2006 · national
Continuity (10)
Continuation 15874939 · Jan 19, 2018
Continuation 15421611 · Feb 1, 2017
Continuation 14989886 · Jan 7, 2016
Continuation 14726752 · Jun 1, 2015
Continuation 14661078 · Mar 18, 2015
Continuation 14275962 · May 13, 2014
Continuation 13848878 · Mar 22, 2013
Continuation 12982200 · Dec 30, 2010
Continuation 11772924 · Jul 3, 2007
Related Publication 20190157374A1 · May 23, 2019