IP Library Granted Patent US 10,600,717
Granted Patent B2
US 10,600,717 · App. 16/242,398 · Granted Mar 24, 2020

Semiconductor device

Inventor: Shingo Tsuchimochi (Nagakute, JP)
Assignee: Toyota Jidosha Kabushiki Kaisha
H01L23/3735H01L23/10H01L23/31H01L23/367H01L23/4334H01L24/33H01L2924/01013H01L2924/01029H01L2924/3511
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Quick Facts
Patent No.
US 10,600,717
App. No.
16/242,398
Granted
Mar 24, 2020
Kind
B2
Abstract

A semiconductor device includes a first semiconductor element, a first heat dissipation plate connected to the first semiconductor element, a sealing body that integrally holds the first semiconductor element and the first heat dissipation plate, and a first terminal that is electrically connected to the first semiconductor element and protrudes from the sealing body. The first heat dissipation plate has an insulating substrate, an inner conductor layer, and an outer conductor layer. The outer conductor layer is exposed on a first main surface of the sealing body. The first terminal protrudes from a first side surface adjacent to the first main surface of the sealing body. On the first main surface of the sealing body, at least one first groove extending in a direction along the first side surface is provided in a range located between the outer conductor layer and the first side surface.

Claims (119)

1. A semiconductor device comprising:

a first semiconductor element;

a first heat dissipation plate connected to the first semiconductor element;

a sealing body that integrally holds the first semiconductor element and the first heat dissipation plate; and

a first terminal that is electrically connected to the first semiconductor element and protrudes from the sealing body, wherein:

the first heat dissipation plate has

a first insulating substrate,

a first inner conductor layer that is located on a first side of the first insulating substrate and is electrically connected to the first semiconductor element, and

a first outer conductor layer that is located on a second side of the first insulating substrate;

the first outer conductor layer is exposed on a first main surface of the sealing body;

the first terminal protrudes from a first side surface adjacent to the first main surface of the sealing body;

on the first main surface of the sealing body, at least one first groove extending in a direction along the first side surface is provided in a range located between the first outer conductor layer and the first side surface;

wherein the at least one first groove includes a plurality of first grooves; and

a groove located closer to the first side surface among the first grooves has a larger depth.

2. The semiconductor device according to claim 1 , further comprising a second terminal that is electrically connected to the first semiconductor element and protrudes from the sealing body, wherein:

the second terminal protrudes from a second side surface located on a side opposite to the first side surface of the sealing body; and

on the first main surface of the sealing body, at least one second groove extending in a direction along the second side surface is further provided in a range located between the first outer conductor layer and the second side surface.

3. The semiconductor device according to claim 2 , wherein:

a width of the first terminal is larger than a width of the second terminal; and

the number of the at least one first groove is larger than the number of the at least one second groove.

4. The semiconductor device according to claim 2 , wherein:

a width of the first terminal is larger than a width of the second terminal; and

a depth of the at least one first groove is larger than a depth of the at least one second groove.

5. The semiconductor device according to claim 2 , wherein:

a width of the first terminal is larger than a width of the second terminal;

the number of the at least one first groove is larger than the number of the at least one second groove; and

a depth of the at least one first groove is larger than a depth of the at least one second groove.

6. The semiconductor device according to claim 2 , further comprising a second heat dissipation plate that faces the first heat dissipation plate with the first semiconductor element interposed between the first heat dissipation plate and the second heat dissipation plate, wherein:

the second heat dissipation plate has

a second insulating substrate,

a second inner conductor layer that is located on a first side of the second insulating substrate and is electrically connected to the first semiconductor element, and

a second outer conductor layer that is located on a second side of the second insulating substrate;

the second outer conductor layer of the second heat dissipation plate is exposed on a second main surface of the sealing body located on a side opposite to the first main surface; and

on the second main surface of the sealing body, at least one third groove extending in a direction along the first side surface is provided in a range located between the second outer conductor layer of the second heat dissipation plate and the first side surface.

7. The semiconductor device according to claim 6 , wherein:

the at least one third groove includes a plurality of third grooves; and

a groove located closer to the first side surface among the third grooves has a larger depth.

8. The semiconductor device according to claim 6 , wherein, on the second main surface of the sealing body, at least one fourth groove extending in a direction along the second side surface is further provided in a range located between the second outer conductor layer and the second side surface.

9. The semiconductor device according to claim 8 , wherein:

a width of the first terminal is larger than a width of the second terminal; and

the number of the at least one third groove is larger than the number of the at least one fourth groove.

10. The semiconductor device according to claim 8 , wherein:

a width of the first terminal is larger than a width of the second terminal; and

a depth of the at least one third groove is larger than a depth of the at least one fourth groove.

11. The semiconductor device according to claim 8 , wherein:

a width of the first terminal is larger than a width of the second terminal;

the number of the at least one third groove is larger than the number of the at least one fourth groove; and

a depth of the at least one third groove is larger than a depth of the at least one fourth groove.

12. The semiconductor device according to claim 1 , further comprising a second heat dissipation plate that faces the first heat dissipation plate with the first semiconductor element interposed between the first heat dissipation plate and the second heat dissipation plate, wherein:

the second heat dissipation plate has

a second insulating substrate,

a second inner conductor layer that is located on a first side of the second insulating substrate and is electrically connected to the first semiconductor element, and

a second outer conductor layer that is located on a second side of the second insulating substrate;

the second outer conductor layer of the second heat dissipation plate is exposed on a second main surface of the sealing body located on a side opposite to the first main surface; and

on the second main surface of the sealing body, at least one groove extending in a direction along the first side surface is provided in a range located between the second outer conductor layer of the second heat dissipation plate and the first side surface.

13. The semiconductor device according to claim 12 , wherein:

the at least one groove includes a plurality of grooves; and

a groove located closer to the first side surface among the grooves has a larger depth.

14. The semiconductor device according to claim 12 , further comprising a second terminal that is electrically connected to the first semiconductor element and protrudes from the sealing body, wherein:

the second terminal protrudes from a second side surface located on a side opposite to the first side surface of the sealing body; and

on the second main surface of the sealing body, at least one fourth groove extending in a direction along the second side surface is further provided in a range located between the second outer conductor layer and the second side surface.

15. The semiconductor device according to claim 14 , wherein:

a width of the first terminal is larger than a width of the second terminal; and

the number of the at least one third groove is larger than the number of the at least one fourth groove.

16. The semiconductor device according to claim 14 , wherein:

a width of the first terminal is larger than a width of the second terminal; and

a depth of the at least one third groove is larger than a depth of the at least one fourth groove.

17. The semiconductor device according to claim 14 , wherein:

a width of the first terminal is larger than a width of the second terminal;

the number of the at least one third groove is larger than the number of the at least one fourth groove; and

a depth of the at least one third groove is larger than a depth of the at least one fourth groove.

18. The semiconductor device according to claim 1 , further comprising:

a second semiconductor element;

a heat dissipation plate that is connected to the second semiconductor element and is held integrally with the second semiconductor element by the sealing body; and

a terminal that is electrically connected to the second semiconductor element and protrudes from the sealing body, wherein:

the heat dissipation plate has

an insulating substrate,

an inner conductor layer that is located on a first side of the insulating substrate and is electrically connected to the second semiconductor element, and

an outer conductor layer that is located on a second side of the insulating substrate;

the outer conductor layer of the heat dissipation plate is exposed on the first main surface of the sealing body;

the terminal protrudes from the first side surface of the sealing body; and

the at least one first groove extends to a range located between the outer conductor layer of the heat dissipation plate and the first side surface.

19. A semiconductor device comprising:

a first semiconductor element;

a first heat dissipation plate connected to the first semiconductor element;

a sealing body that integrally holds the first semiconductor element and the first heat dissipation plate;

a first terminal that is electrically connected to the first semiconductor element and protrudes from the sealing body; and

a second terminal that is electrically connected to the first semiconductor element and protrudes from the sealing body, wherein:

the first heat dissipation plate has

a first insulating substrate,

a first inner conductor layer that is located on a first side of the first insulating substrate and is electrically connected to the first semiconductor element, and

a first outer conductor layer that is located on a second side of the first insulating substrate;

the first outer conductor layer is exposed on a first main surface of the sealing body;

the first terminal protrudes from a first side surface adjacent to the first main surface of the sealing body;

the second terminal protrudes from a second side surface located on a side opposite to the first side surface of the sealing body;

on the first main surface of the sealing body, at least one first groove extending in a direction along the first side surface is provided in a range located between the first outer conductor layer and the first side surface, and at least one second groove extending in a direction along the second side surface is further provided in a range located between the first outer conductor layer and the second side surface;

a width of the first terminal is larger than a width of the second terminal; and

the number of the at least one first groove is larger than the number of the at least one second groove.

20. A semiconductor device comprising:

a first semiconductor element;

a first heat dissipation plate connected to the first semiconductor element;

a sealing body that integrally holds the first semiconductor element and the first heat dissipation plate;

a first terminal that is electrically connected to the first semiconductor element and protrudes from the sealing body; and

a second heat dissipation plate that faces the first heat dissipation plate with the first semiconductor element interposed between the first heat dissipation plate and the second heat dissipation plate, wherein:

the first heat dissipation plate has

a first insulating substrate,

a first inner conductor layer that is located on a first side of the first insulating substrate and is electrically connected to the first semiconductor element, and

a first outer conductor layer that is located on a second side of the first insulating substrate;

the first outer conductor layer is exposed on a first main surface of the sealing body;

the first terminal protrudes from a first side surface adjacent to the first main surface of the sealing body;

the second heat dissipation plate has

a second insulating substrate,

a second inner conductor layer that is located on a first side of the second insulating substrate and is electrically connected to the first semiconductor element, and

a second outer conductor layer that is located on a second side of the second insulating substrate;

the second outer conductor layer of the second heat dissipation plate is exposed on a second main surface of the sealing body located on a side opposite to the first main surface;

on the first main surface of the sealing body, at least one first groove extending in a direction along the first side surface is provided in a range located between the first outer conductor layer and the first side surface;

on the second main surface of the sealing body, at least one groove extending in a direction along the first side surface is provided in a range located between the second outer conductor layer of the second heat dissipation plate and the first side surface;

the at least one groove includes a plurality of grooves; and

a groove located closer to the first side surface among the grooves has a larger depth.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: TOYOTA JIDOSHA KABUSHIKI KAISHA (AKA TOYOTA MOTOR CORPORATION)
To: DENSO CORPORATION
Reel/Frame 052280/0207 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 8, 2019
From: TSUCHIMOCHI, SHINGO
To: TOYOTA JIDOSHA KABUSHIKI KAISHA
Reel/Frame 048031/0781 →
Priority Claims (1)
JP 2018-005643 · Jan 17, 2018 · national
Continuity (1)
Related Publication 20190221496A1 · Jul 18, 2019