IP Library Granted Patent US 10,802,079
Granted Patent B2
US 10,802,079 · App. 16/247,811 · Granted Oct 13, 2020

System and method for bidirectional current sense circuits

Inventor: Razvan Puscasu (Targoviste, RO)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
G01R31/387G01R31/382H02M3/07H03F3/72H03F2203/7203H03F2203/7212
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Quick Facts
Patent No.
US 10,802,079
App. No.
16/247,811
Granted
Oct 13, 2020
Kind
B2
Abstract

Operating current sense circuits. At least some of the example embodiments are methods including: sensing a current flow through a sense resistor by way of an operational amplifier defining a non-inverting input coupled to a first side of the sense resistor and an inverting input coupled to a second side of the sense resistor; driving a signal to a sense output of the operational amplifier, the signal proportional to the current flow through the sense resistor; and then disabling the current sense circuit comprising: de-coupling a first feedback path of the operational amplifier, the first feedback path coupled to the non-inverting input; and de-coupling a second feedback path of the operational amplifier, the second feedback path coupled to the inverting input. The methods also include disabling the current sense circuit by disabling an input stage of the operational amplifier.

Claims (60)

1. A method of operating a current sense circuit, comprising:

sensing a current flow through a sense resistor by way of an operational amplifier;

driving a signal to a sense output of the operational amplifier, the signal proportional to the current flow through the sense resistor; and then

disabling the current sense circuit by de-coupling a first feedback path of the operational amplifier, and de-coupling a second feedback path of the operational amplifier.

2. The method of claim 1 wherein disabling the current sense circuit further comprises disabling an input stage of the operational amplifier.

3. The method of claim 2 wherein disabling the current sense circuit further comprises:

electrically floating an input stage ground; and

forcing a voltage on an input stage voltage rail to be within a predetermined threshold voltage of the input stage ground.

4. The method of claim 3 wherein electrically floating the input stage ground further comprises disabling a controlled current source coupled between the input stage ground and an output stage ground of the operational amplifier.

5. The method of claim 3 wherein forcing the voltage on the input stage voltage rail further comprises conducting current through a diode.

6. The method of claim 1 :

wherein de-coupling the first feedback path further comprises de-coupling the first feedback path from a reference terminal of the current sense circuit; and

wherein de-coupling the second feedback path further comprises de-coupling the second feedback path from the sense output of the operational amplifier.

7. The method of claim 1 wherein de-coupling the first feedback path further comprises making a first electrically controlled switch non-conductive, the first electrically controlled switch in the first feedback path.

8. The method of claim 7 wherein de-coupling the second feedback path further comprises making a second electrically controlled switch non-conductive, the second electrically controlled switch in the second feedback path.

9. The method of claim 7 wherein sensing the current flow through the sense resistor further comprises coupling the first feedback path to a non-inverting input of the operational amplifier.

10. The method of claim 9 wherein sensing the current flow through the sense resistor further comprise coupling the second feedback path to an inverting input of the operational amplifier.

11. A current sense integrated circuit comprising:

a first input terminal, and a second input terminal, a reference terminal, an output terminal, an enable terminal, and a ground terminal;

an amplifier coupled to the first and second input terminals, the amplifier defining a sense output coupled to the output terminal;

a first feedback path coupled between the reference terminal and the amplifier;

a second feedback path coupled between the sense output and the amplifier; and

the current sense integrated circuit configured to make the first and second feedback paths conductive responsive to assertion of the enable terminal, and the current sense integrated circuit configured to make the first and second feedback paths non-conductive responsive to de-assertion of the enable terminal.

12. The current sense integrated circuit of claim 11 wherein the operational amplifier further comprises:

a first stage defining a first stage voltage rail, a first stage ground, and a first stage output;

a second stage defining a second stage ground;

a controlled current source coupled between the first stage ground and the second stage ground; and

a diode coupled between the first stage voltage rail and the first stage ground;

the current sense integrated circuit configured to electrically float the first stage ground with respect to the second stage ground by disabling the controlled current source, and further configured to force a voltage on the first stage voltage rail to be within a predetermined threshold voltage of the first stage ground.

13. The current sense integrated circuit of claim 11 further comprising:

a power terminal;

a power-on reset (POR) circuit defining a sense input and a POR output, the sense input coupled to the power terminal, the POR circuit configured to assert the POR output when voltage on the power terminal exceeds a predetermined value;

an enable circuit defining an enable input, a power input, and an internal enable output, the enable input coupled to the enable terminal, and the power input coupled to the POR output, the enable circuit configured to assert the internal enable output when both the enable input and power input are asserted;

a switch control circuit defining an enable input and a switch output, the enable input of the switch control circuit coupled to the internal enable output, and the switch output coupled to control inputs of the first and second feedback paths;

the switch control circuit configured to assert the switch output to make the first and second feedback paths conductive responsive to assertion of the internal enable output, and configured to de-assert the switch output to make the first and second feedback paths non-conductive responsive to de-assertion of the internal enable output.

14. The current sense integrated circuit of claim 13 wherein the first feedback path comprises a first electrically controlled switch.

15. The current sense integrated circuit of claim 14 wherein the second feedback path comprises a second electrically controlled switch, distinct from the first electrically controlled switch.

16. A system comprising:

a battery;

a load;

a sense resistor coupled between the battery and the load;

a current sense circuit comprising:

an enable input;

an amplifier coupled to the sense resistor, the operational amplifier defining a sense output;

a first feedback path coupled between operational amplifier and a reference terminal;

a second feedback path coupled between the operational amplifier and the sense output; and

the current sense circuit configured to make the first and second feedback paths conductive responsive to assertion of the enable input, and the current sense circuit configured to make the first and second feedback paths non-conductive responsive to de-assertion of the enable input.

17. The system of claim 16 wherein the operational amplifier further comprises:

a first stage defining a first stage voltage rail, a first stage ground, and a first stage output;

a second stage defining a second stage ground;

a controlled current source coupled between the first stage ground and the second stage ground; and

a diode coupled between the first stage voltage rail and the first stage ground;

the current sense circuit configured to electrically float the first stage ground with respect to the second stage ground by disabling the controlled current source, and further configured to force a voltage on the first stage voltage rail to be within a predetermined threshold voltage of the first stage ground.

18. The system of claim 16 wherein the current sense circuit further comprises:

a power-on reset (POR) circuit defining a sense input and a POR output, the sense input coupled to a source of power, the POR circuit configured to assert the POR output when voltage provided by the source of power exceeds a predetermined value;

an enable circuit defining the enable input, a power input, and an internal enable output, the power input coupled to the POR output, and the enable circuit configured to assert the internal enable output when both the enable input and power input are asserted;

a switch control circuit defining an enable input and a switch output, the enable input of the switch control circuit coupled to the internal enable output, and the switch output coupled to control inputs of the first and second feedback paths;

the switch control circuit configured to assert the switch output to make the first and second feedback paths conductive, and configured to de-assert the switch output to make the first and second feedback paths non-conductive responsive to de-assertion of the internal enable output.

19. The system of claim 18 wherein the first feedback path comprises a first electrically controlled switch.

20. The system of claim 18 wherein the second feedback path comprises a second electrically controlled switch, the second electrically controlled switch distinct from the first electrically controlled switch.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL 049473, FRAME 0932 Recorded Aug 17, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064618/0721 →
SECURITY INTEREST Recorded Jun 14, 2019
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 049473/0932 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 15, 2019
From: PUSCASU, RAZVAN
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 048007/0669 →