Envelope tracking circuit and related power amplifier apparatus
An envelope tracking (ET) circuit and related power amplifier apparatus is provided. An ET power amplifier apparatus includes an ET circuit and a number of amplifier circuits. The ET circuit is configured to provide a number of ET modulated voltages to the amplifier circuits for amplifying concurrently a number of radio frequency (RF) signals. The ET circuit includes a target voltage circuit for generating a number of ET target voltages adapted to respective power levels of the RF signals and/or respective impedances seen by the amplifier circuits, a supply voltage circuit for generating a number of constant voltages, and an ET voltage circuit for generating the ET modulated voltages based on the ET target voltages and a selected one of the constant voltages. By employing a single ET circuit, it may be possible to reduce the footprint and improve heat dissipation of the ET power amplifier apparatus.
1. An envelope tracking (ET) voltage circuit comprising:
a plurality of voltage selection circuits each configured to receive a plurality of constant voltages; and
a plurality of voltage controllers coupled to the plurality of voltage selection circuits, respectively, and configured to:
receive a plurality of ET target voltages, respectively;
control the plurality of voltage selection circuits to output a plurality of selected constant voltages based on the plurality of ET target voltages, respectively; and
cause a plurality of ET modulated voltages to be generated based on the plurality of ET target voltages and the plurality of selected constant voltages, respectively.
2. The ET voltage circuit of claim 1 wherein:
the plurality of voltage selection circuits comprises a plurality of switching circuits each configured to receive the plurality of selected constant voltages; and
the plurality of voltage controllers coupled to the plurality of switching circuits, respectively, the plurality of voltage controllers each configured to:
determine a respective selected constant voltage to be outputted by a respective switching circuit among the plurality of switching circuits based on a respective ET target voltage among the plurality of ET target voltages; and
control the respective switching circuit to output the respective selected constant voltage as a respective ET modulated voltage among the plurality of ET modulated voltages.
3. The ET voltage circuit of claim 2 wherein each of the plurality of voltage controllers is further configured to determine the respective selected constant voltage as being equal to minimize [V DC-j ≥(V TARGET-i +V Headroom )] (1≤i≤N) (1≤j≤M), wherein:
V DC-j represents any of the plurality of constant voltages;
V TARGET-i represents the respective ET target voltage among the plurality of ET target voltages;
V Headroom represents a predefined headroom voltage;
i represents any one of the plurality of ET target voltages;
N represents a count of the plurality of ET target voltages;
j represents any one of the plurality of constant voltages; and
M represents a count of the plurality of constant voltages.
4. The ET voltage circuit of claim 1 further comprising a plurality of voltage amplifiers coupled to the plurality of voltage controllers and the plurality of voltage selection circuits, respectively, the plurality of voltage amplifiers is configured to generate the plurality of ET modulated voltages based on the plurality of ET target voltages and a plurality of supply voltages, respectively.
5. The ET voltage circuit of claim 4 wherein each of the plurality of voltage controllers is further configured to:
determine a respective selected constant voltage to be outputted by a respective voltage selecting circuit among the plurality of voltage selection circuits based on a respective ET target voltage among the plurality of ET target voltages; and
control the respective voltage selection circuit to output the respective selected constant voltage to a respective voltage amplifier among the plurality of voltage amplifiers as a respective supply voltage among the plurality of supply voltages.
6. The ET voltage circuit of claim 5 wherein the plurality of voltage selection circuits each comprises a plurality of field-effect transistors (FETs) disposed according to a serial arrangement, the plurality of FETs comprising:
a plurality of drain electrodes configured to receive the plurality of constant voltages, respectively;
a plurality of gate electrodes coupled to a respective voltage controller among the plurality of voltage controllers; and
a plurality of source electrodes coupled to a respective second FET among a plurality of second FETs.
7. The ET voltage circuit of claim 6 wherein the ET voltage circuit further comprises a plurality of linear FETs, each of the plurality of linear FETs comprising:
a gate terminal coupled to a respective voltage amplifier among the plurality of voltage amplifiers;
a source terminal coupled to a respective voltage selection circuit among the plurality of voltage selection circuits; and
a drain terminal coupled to a respective second FET among the plurality of second FETs and configured to output a respective ET modulated voltage among the plurality of ET modulated voltages.