IP Library Granted Patent US 10,698,690
Granted Patent B2
US 10,698,690 · App. 16/251,620 · Granted Jun 30, 2020

Synchronisation of execution threads on a multi-threaded processor

Inventor: Yoong Chert Foo (London, GB)
Assignee: Imagination Technologies Limited
G06F9/30145G06F9/3851G06F9/522G06F9/524G06F8/458G06F9/3009G06F9/30087G06F9/461
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Quick Facts
Patent No.
US 10,698,690
App. No.
16/251,620
Granted
Jun 30, 2020
Kind
B2
Abstract

Method and apparatus are provided for synchronising execution of a plurality of threads on a multi-threaded processor. A program executed by a thread can have a number of synchronisation points corresponding to points where execution is to be synchronised with another thread. Execution of a thread is paused when it reaches a synchronisation point until at least one other thread with which it is intended to be synchronised reaches a corresponding synchronisation point. Execution is subsequently resumed. A control core maintains status data for threads and can cause a thread that is ready to run to use execution resources that were occupied by a thread that is waiting for a synchronisation event.

Claims (24)

1. A method for synchronising execution of a plurality of threads on a multi-threaded processor, each thread being provided with a number of synchronisation points, the method comprising:

pausing execution of a first thread of the plurality of threads on the multi-threaded processor when the first thread reaches a synchronisation point,

waiting for all other threads of the plurality of threads with which the first thread is intended to be synchronised to reach a corresponding synchronisation point, and

subsequently resuming execution, the method further comprising:

pausing execution of a second thread of the plurality of threads on the multi-threaded processor at a branch target following a branch which branches over a section of code for execution by threads of the plurality of threads which includes the synchronisation point, the branching of the second thread thereby avoiding the synchronisation point, until at least one of the other threads reaches the branch target.

2. The method of claim 1 , in which execution of the first thread is paused in a wait for synchronisation start state.

3. The method of claim 1 , in which execution of the second thread is paused in a wait for synchronisation end state.

4. The method of claim 1 , further comprising repeatedly checking whether the threads with which one or both of the paused first thread and the paused second thread is to be synchronised have also paused.

5. The method of claim 4 , in which repeatedly checking whether the threads have paused comprises checking the status of at least one bit in a status register for each of the threads.

6. The method of claim 1 , in which execution of the second thread is paused at the branch target until at least one of the other threads reaches the branch target without branching.

7. The method of claim 1 , in which execution of the second thread is paused at the branch target until all of the other threads reach the branch target by branching.

8. The method of claim 1 , further comprising, when the first thread is paused or the second thread is paused, switching the paused thread with another thread of the plurality of threads which is available for execution.

9. Apparatus for synchronising execution of a plurality of threads on a multi-threaded processor, each thread being provided with a number of synchronisation points, the apparatus comprising:

a controller configured to

pause execution of a first thread of the plurality of threads on the multi-threaded processor when the first thread reaches a synchronisation point, until all other threads of the plurality of threads with which the first thread is intended to be synchronised reach a corresponding synchronisation point, and cause the first thread to subsequently resume execution,

the controller being further configured to

pause execution of a second thread of the plurality of threads on the multi-threaded processor at a branch target following a branch which branches over a section of code for execution by threads of the plurality of threads which includes the synchronisation point, the branching of the second thread thereby avoiding the synchronisation point, until at least one of the other threads reaches the branch target.

10. The apparatus of claim 9 , in which the controller is further configured to cause execution of the first thread to be paused in a wait for synchronisation start state.

11. The apparatus of claim 9 , in which the controller is further configured to cause execution of the second thread to be paused in a wait for synchronisation end state.

12. The apparatus of claim 9 , in which the controller is further configured to repeatedly check whether the threads with which one or both of the paused first thread and the paused second thread is to be synchronised have also paused.

13. The apparatus of claim 12 , in which the controller is further configured to check the status of at least one bit in a status register for each of the threads.

14. The apparatus of claim 9 , in which the controller is further configured to pause execution of the second thread until at least one of the other threads reaches the branch target without branching.

15. The apparatus of claim 9 , in which the controller is further configured to pause execution of the second thread until all of the other threads reach the branch target by branching.

16. The apparatus of claim 9 , in which the controller is further configured to switch the paused first thread or the paused second thread with another thread of the plurality of threads which is available for execution.

Assignments (1)
SECURITY INTEREST Recorded Jul 31, 2024
From: IMAGINATION TECHNOLOGIES LIMITED
To: FORTRESS INVESTMENT GROUP (UK) LTD
Reel/Frame 068221/0001 →
Priority Claims (1)
GB 0613289.8 · Jul 4, 2006 · national
Continuity (5)
Continuation 14177980 · Feb 11, 2014
Continuation 13483682 · May 30, 2012
Continuation 11895618 · Aug 24, 2007
Continuation In Part 11591801 · Nov 2, 2006
Related Publication 20190155607A1 · May 23, 2019