IP Library Granted Patent US 10,833,092
Granted Patent B2
US 10,833,092 · App. 16/255,569 · Granted Nov 10, 2020

Methods of incorporating leaker-devices into capacitor configurations to reduce cell disturb, and capacitor configurations incorporating leaker-devices

Inventors: Alessandro Calderoni (Boise, ID); Beth R. Cook (Boise, ID); Durai Vishak Nirmal Ramaswamy (Boise, ID); Ashonita A. Chavan (Boise, ID)
Assignee: Micron Technology, Inc.
H01L27/11509G11C11/221G11C11/2295H01G4/008H01G4/06H01G4/40H01L27/11504H01L27/11507H01L28/55H01L28/60
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Quick Facts
Patent No.
US 10,833,092
App. No.
16/255,569
Granted
Nov 10, 2020
Kind
B2
Abstract

Some embodiments include an integrated assembly having first electrodes with top surfaces, and with sidewall surfaces extending downwardly from the top surfaces. The first electrodes are solid pillars. Insulative material is along the sidewall surfaces of the first electrodes. Second electrodes extend along the sidewall surfaces of the first electrodes and are spaced from the sidewall surfaces by the insulative material. Conductive-plate-material extends across the first and second electrodes, and couples the second electrodes to one another. Leaker-devices electrically couple the first electrodes to the conductive-plate-material and are configured to discharge at least a portion of excess charge from the first electrodes to the conductive-plate-material. Some embodiments include methods of forming integrated assemblies.

Claims (33)

1. An integrated assembly, comprising:

first electrodes having top surfaces and sidewall surfaces extending downwardly from the top surfaces; the first electrodes being solid pillars;

insulative material along the sidewall surfaces of the first electrodes;

second electrodes extending along the sidewall surfaces of the first electrodes and being spaced from the sidewall surfaces by the insulative material;

conductive-plate-material extending across the first and second electrodes, and coupling the second electrodes to one another; and

leaker-devices electrically coupling the first electrodes to the conductive-plate-material and being configured to discharge at least a portion of excess charge from the first electrodes to the conductive-plate-material.

2. The integrated assembly of claim 1 wherein the leaker-devices extend from the top surfaces of the first electrodes to the conductive-plate-material.

3. The integrated assembly of claim 2 wherein the leaker-devices are horizontally-elongated structures extending along the top surfaces of the first electrodes.

4. The integrated assembly of claim 2 wherein the leaker-devices include vertically-elongated structures extending upwardly from the top surfaces of the first electrodes.

5. The integrated assembly of claim 1 wherein the first electrodes, insulative material, second electrodes, and leaker-devices together comprise capacitors; and wherein each of the capacitors is comprised by a memory cell of a memory array.

6. The integrated assembly of claim 1 wherein the leaker-devices comprise one or more of Ti, Ni and Nb, in combination with one or more of Ge, Si, O, N and C.

7. The integrated assembly of claim 1 wherein the leaker-devices comprise one or more of Si, Ge, SiN, TiSiN, TiO, TiN, NiO, NiON and TiON; where the chemical formulas indicate primary constituents rather than particular stoichiometries.

8. The integrated assembly of claim 1 wherein the leaker-devices comprise titanium, oxygen and nitrogen.

9. The integrated assembly of claim 1 wherein the insulative material is ferroelectric insulative material.

10. An integrated assembly, comprising:

first electrodes which are horizontally-spaced from one another, and which are configured as vertically-extending pillars; each of the vertically-extending pillars having sidewall surfaces along a cross-section, having a bottom surface, and having a top surface, with the sidewall surfaces extending from the bottom surface to the top surface;

insulative material along the sidewall surfaces of the vertically-extending pillars;

second electrodes laterally between the vertically-extending pillars and spaced from the sidewall surfaces by the insulative material;

conductive-plate-material extending across the first and second electrodes, and coupling the second electrodes to one another; and

leaker-devices extending from the top surfaces of the vertically-extending pillars to the conductive-plate-material; the leaker-devices being configured to discharge at least a portion of excess charge from the first electrodes to the conductive-plate-material.

11. The integrated assembly of claim 10 wherein the leaker-devices are horizontally-elongated structures extending along the top surfaces of the vertically-extending pillars.

12. The integrated assembly of claim 10 wherein the leaker-devices include vertically-elongated structures extending upwardly from the top surfaces of the vertically-extending pillars.

13. The integrated assembly of claim 10 wherein the first electrodes, insulative material, second electrodes, and leaker-devices together comprise capacitors; and wherein each of the capacitors is comprised by a memory cell of a memory array.

14. The integrated assembly of claim 13 wherein the bottom surface of each of the first electrodes is along a conductive contact which is coupled with an access transistor.

15. The integrated assembly of claim 10 wherein the leaker-devices comprise one or more of Ti, Ni and Nb, in combination with one or more of Ge, Si, O, N and C.

16. The integrated assembly of claim 10 wherein the leaker-devices comprise one or more of Si, Ge, SiN, TiSiN, TiO, TiN, NiO, NiON and TION; where the chemical formulas indicate primary constituents rather than particular stoichiometries.

17. The integrated assembly of claim 10 wherein the leaker-devices comprise titanium, oxygen and nitrogen.

18. The integrated assembly of claim 10 wherein the insulative material is ferroelectric insulative material.

19. The integrated assembly of claim 10 wherein the vertically-extending pillars are laterally supported by horizontal beams of a lattice-structure; and wherein said horizontal beams extend between sidewall surfaces of neighboring vertically-extending pillars.

20. The integrated assembly of claim 19 wherein the horizontal beams have upper surfaces; wherein the leaker-devices have upper surfaces; and wherein the upper surfaces of the horizontal beams are substantially coplanar with the upper surfaces of the leaker-devices.

21. The integrated assembly of claim 19 wherein the leaker-devices are horizontally-elongated.

22. The integrated assembly of claim 19 wherein the leaker-devices include vertically-elongated structures.

23. The integrated assembly of claim 19 wherein the horizontal beams comprise silicon nitride.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 15, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051041/0317 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050724/0392 →
SUPPLEMENT NO. 12 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048948/0677 →
SUPPLEMENT NO. 3 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 048951/0902 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 23, 2019
From: CALDERONI, ALESSANDRO; COOK, BETH R.; RAMASWAMY, DURAI VISHAK NIRMAL; CHAVAN, ASHONITA A.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 048113/0244 →