IP Library Granted Patent US 10,937,885
Granted Patent B2
US 10,937,885 · App. 16/259,038 · Granted Mar 2, 2021

Electronic device and method of manufacturing the same

Inventors: Jinseong Heo (Seoul, KR); Yunseong Lee (Osan, KR); Sanghyun Jo (Seoul, KR); Keunwook Shin (Yongin-si, KR); Hyeonjin Shin (Suwon-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H01L29/513H01L21/0228H01L21/02115H01L21/02164H01L21/02178H01L21/02181H01L21/02189H01L21/02356H01L29/516
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Quick Facts
Patent No.
US 10,937,885
App. No.
16/259,038
Granted
Mar 2, 2021
Kind
B2
Abstract

Provided are electronic devices and methods of manufacturing the same. An electronic device may include a substrate, a gate electrode on the substrate, a ferroelectric layer between the substrate and the gate electrode, and a carbon layer between the substrate and the ferroelectric layer. The carbon layer may have an sp 2 bonding structure.

Claims (60)

1. An electronic device comprising:

a substrate, the substrate including a channel element in the substrate;

a gate electrode on the substrate and positioned so the channel element in the substrate is at a location corresponding to the gate electrode;

a ferroelectric layer between the substrate and the gate electrode; and

a carbon layer between the substrate and the ferroelectric layer, the carbon layer having an sp 2 bonding structure.

2. The electronic device of claim 1 , wherein

the substrate further includes a source and a drain at both sides of the channel element.

3. The electronic device of claim 1 , further comprising:

an insulating layer between the substrate and the carbon layer.

4. The electronic device of claim 1 , further comprising:

an insulating layer between the carbon layer and the ferroelectric layer.

5. The electronic device of claim 1 , wherein the gate electrode includes a conductive metal or a carbon material having an sp 2 bonding structure.

6. The electronic device of claim 1 , wherein the ferroelectric layer includes an oxide including at least one of silicon (Si), aluminum (Al), hafnium (Hf), and zirconium (Zr).

7. The electronic device of claim 6 , wherein the oxide further includes a dopant.

8. The electronic device of claim 1 , wherein a thickness of the carbon layer of 0.4 nm to 100 nm.

9. The electronic device of claim 1 , wherein

the carbon layer includes nanocrystalline graphene including nano-sized crystals, and

the nano-sized crystals in the nanocrystalline graphene have a size of 0.5 nm to 100 nm.

10. The electronic device of claim 1 , wherein,

the carbon layer includes nanocrystalline graphene including nano-sized crystals, and

in the nanocrystalline graphene, a ratio of carbon having an sp 2 bonding structure to total carbon is 50% to 99%.

11. The electronic device of claim 1 , wherein

the carbon layer includes nanocrystalline graphene including nano-sized crystals, and

the nanocrystalline graphene contains 1 atomic percent (at %) to 20 at % of hydrogen.

12. An electronic device comprising:

a substrate;

a gate electrode on the substrate;

a ferroelectric layer between the substrate and the gate electrode; and

a carbon layer between the substrate and the ferroelectric layer, the carbon layer having an sp2 bonding structure,

the carbon layer including nanocrystalline graphene including nano-sized crystals having a size of 0.5 nm to 100 nm.

13. The electronic device of claim 12 , wherein at least one of

a D-parameter of the nanocrystalline graphene in the carbon layer ranges 18 eV to 22.9 eV, and

a sheet resistance of the nanocrystalline graphene in the carbon layer is at least 1,000 Ohm/sq.

14. The electronic device of claim 12 , wherein, in the nanocrystalline graphene, a ratio of carbon having an sp 2 bonding structure to total carbon is 50% to 99%.

15. The electronic device of claim 12 , wherein the nanocrystalline graphene contains 1 atomic percent (at %) to 20 at % of hydrogen.

16. An electronic device comprising:

a substrate;

a channel element,

the channel element being a channel layer on the substrate and separate from the substrate, or

the channel element being a protruding portion of the substrate where a material of the protruding portion of the substrate is the same as a material of the substrate;

a source and a drain connected to opposite ends of the channel element;

a gate electrode on the channel element, the gate electrode spaced apart from the source, drain, and channel element;

a ferroelectric layer between the channel element and the gate electrode; and

a carbon layer between the channel element and the ferroelectric layer,

the carbon layer configured to limit diffusion of at least one of metal or oxygen from the ferroelectric layer into the channel element,

the carbon layer including nanocrystalline graphene including nano-sized crystals, and

in the nanocrystalline graphene, a ratio of carbon having an sp 2 bonding structure to total carbon is 50% to 99%.

17. The electronic device of claim 16 , further comprising:

an insulating layer on the channel element, wherein

the insulating layer is between the channel element and the ferroelectric layer, or the insulating layer is between the gate electrode and the ferroelectric layer.

18. The electronic device of claim 16 , wherein

the channel element is the channel layer.

19. The electronic device of claim 16 , wherein the ferroelectric layer includes an oxide including at least one of silicon (Si), aluminum (Al), hafnium (Hf), and zirconium (Zr).

20. The electronic device of claim 16 , wherein the nano-sized crystals in the nanocrystalline graphene have a size of 0.5 nm to 100 nm.

21. The electronic device of claim 16 , wherein the nanocrystalline graphene contains 1 atomic percent (at %) to 20 at % of hydrogen.

22. The electronic device of claim 16 , wherein

the ferroelectric layer includes an oxide including at least one of silicon (Si), aluminum (Al), and zirconium (Zr).

23. The electronic device of claim 22 , wherein the oxide further includes a dopant.

24. The electronic device of claim 23 , wherein a thickness of the carbon layer of 0.4 nm to 100 nm.

25. The electronic device of claim 16 , wherein the channel element is the protruding portion of the substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2019
From: HEO, JINSEONG; LEE, YUNSEONG; JO, SANGHYUN; SHIN, KEUNWOOK; SHIN, HYEONJIN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 048199/0595 →
Priority Claims (1)
KR 10-2018-0111596 · Sep 18, 2018 · national
Continuity (1)
Related Publication 20200091306A1 · Mar 19, 2020
Cited By (1)
US 12,538,556