IP Library › Granted Patent US 10,838,863
Granted Patent B2
US 10,838,863 · App. 16/265,131 · Granted Nov 17, 2020

Storage system with write cache release protection

Inventors: Lior Kamran (Rishon LeZion, IL); Vladimir Shveidel (Pardes-Hana, IL); David Krakov (Ramat Gan, IL)
Assignee: EMC IP Holding Company LLC
G06F12/0804G06F2212/1032G06F2212/608
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Quick Facts
Patent No.
US 10,838,863
App. No.
16/265,131
Filed
Feb 1, 2019
Granted
Nov 17, 2020
Kind
B2
Examiner
LANE, JOHN A
Art Unit
2139
USPC
711/144
Abstract

A storage system in one embodiment comprises a plurality of storage devices and at least one processing device. In conjunction with destaging data corresponding to an entry in a write cache, the at least one processing device determines a value of a release indication of an entry in a destage data structure that corresponds to the entry in the write cache. Responsive to determining that the value is a first value, the at least one processing device adds an entry that corresponds to the entry in the write cache to a release data structure. The storage system polls the release data structure and releases entries in the write cache that correspond to entries found in the release data structure. Responsive to determining that the value is a second value, an entry corresponding to the entry in the write cache is not added to the release data structure.

Claims (71)

1. An apparatus comprising:

a storage system comprising a plurality of storage devices and at least one processing device coupled to memory,

wherein the at least one processing device is configured, in conjunction with destaging data corresponding to an entry in a write cache to one or more of the plurality of storage devices:

to determine a value of a release indication of an entry in a destage data structure, the entry in the destage data structure corresponding to the entry in the write cache; and

responsive to determining that the value of the release indication is a first value, to add an entry that corresponds to the entry in the write cache to a release data structure, the storage system being configured to poll the release data structure and to release entries in the write cache that correspond to entries found in the release data structure by the polling,

wherein responsive to determining that the value of the release indication is a second value, an entry corresponding to the entry in the write cache is not added to the release data structure.

2. The apparatus of claim 1 wherein the at least one processing devices is further configured, responsive to a failure of a portion of the storage system associated with the entry in the write cache, to set the release indication of the corresponding entry in the destage data structure to the second value.

3. The apparatus of claim 2

wherein the storage system comprises a distributed storage system, the at least one processing device comprising a plurality of control modules and a plurality of data modules,

wherein the portion of the storage system comprises at least one of the control modules, and

wherein the setting of the release indication to the second value is performed by the at least one of the data modules.

4. The apparatus of claim 3 wherein the entry in the destage data structure comprises:

information identifying the corresponding entry in the write cache;

information identifying the at least one of the control modules; and

the release indication.

5. The apparatus of claim 1

wherein the release data structure corresponds to a portion of the storage system, and

wherein the at least one processing device is further configured, responsive to a failure of the portion of the storage system, to clear entries found in the release data structure corresponding to the portion of the storage system.

6. The apparatus of claim 1 wherein the at least one processing device is further configured:

to obtain, from a portion of the storage system that has restarted, a retransmission of the entry in write cache;

to determine whether or not the entry corresponding to the entry in the write cache is included in the destage data structure;

responsive to determining that the corresponding entry is included in the destage data structure, to set the release indication to the first value; and

responsive to determining that the corresponding entry is not included in the destage data structure, to indicate to the portion of the storage system that the data corresponding to the entry in the write cache has been destaged to one or more of the plurality of storage devices.

7. The apparatus of claim 6 wherein, responsive to the indication that the data corresponding to the entry in the write cache has been destaged to one or more of the plurality of storage devices, the portion of the storage system is configured to release the entry in the write cache.

8. A method comprising:

in conjunction with destaging data corresponding to an entry in a write cache to one or more of a plurality of storage devices of a storage system:

determining a value of a release indication of an entry in a destage data structure, the entry in the destage data structure corresponding to the entry in the write cache; and

responsive to determining that the value of the release indication is a first value, adding an entry that corresponds to the entry in the write cache to a release data structure, the storage system being configured to poll the release data structure and to release entries in the write cache that correspond to entries found in the release data structure by the polling,

wherein responsive to determining that the value of the release indication is a second value, an entry corresponding to the entry in the write cache is not added to the release data structure,

wherein the method is implemented by at least one processing device comprising a processor coupled to a memory.

9. The method of claim 8 wherein the method further comprises, responsive to a failure of a portion of the storage system associated with the entry in the write cache, setting the release indication of the corresponding entry in the destage data structure to the second value.

10. The method of claim 9

wherein the storage system comprises a distributed storage system, the at least one processing device comprising a plurality of control modules and a plurality of data modules,

wherein the portion of the storage system comprises at least one of the control modules, and

wherein the setting of the release indication to the second value is performed by the at least one of the data modules.

11. The method of claim 10 wherein the entry in the destage data structure comprises:

information identifying the corresponding entry in the write cache;

information identifying the at least one of the control modules; and

the release indication.

12. The method of claim 8

wherein the release data structure corresponds to a portion of the storage system, and

wherein the method further comprises, responsive to a failure of the portion of the storage system, clearing entries found in the release data structure corresponding to the portion of the storage system.

13. The method of claim 8 the method further comprises:

obtaining, from a portion of the storage system that has restarted, a retransmission of the entry in write cache;

determining whether or not the entry corresponding to the entry in the write cache is included in the destage data structure;

responsive to determining that the corresponding entry is included in the destage data structure, setting the release indication to the first value; and

responsive to determining that the corresponding entry is not included in the destage data structure, indicating to the portion of the storage system that the data corresponding to the entry in the write cache has been destaged to one or more of the plurality of storage devices.

14. The method of claim 13 wherein, responsive to the indication that the data corresponding to the entry in the write cache has been destaged to one or more of the plurality of storage devices, the portion of the storage system releases the entry in the write cache.

15. A computer program product comprising a non-transitory processor-readable storage medium having stored therein program code of one or more software programs, wherein the program code when executed by at least one processing device causes said at least one processing device to:

in conjunction with destaging data corresponding to an entry in a write cache to one or more of a plurality of storage devices of a storage system:

to determine a value of a release indication of an entry in a destage data structure, the entry in the destage data structure corresponding to the entry in the write cache; and

responsive to determining that the value of the release indication is a first value, to add an entry that corresponds to the entry in the write cache to a release data structure, the storage system being configured to poll the release data structure and to release entries in the write cache that correspond to entries found in the release data structure by the polling,

wherein responsive to determining that the value of the release indication is a second value, an entry corresponding to the entry in the write cache is not added to the release data structure.

16. The computer program product of claim 15 the program code when executed by at least one processing device further causes the at least one processing device, responsive to a failure of a portion of the storage system associated with the entry in the write cache, to set the release indication of the corresponding entry in the destage data structure to the second value.

17. The computer program product of claim 16

wherein the storage system comprises a distributed storage system, the at least one processing device comprising a plurality of control modules and a plurality of data modules,

wherein the portion of the storage system comprises at least one of the control modules,

wherein the setting of the release indication to the second value is performed by the at least one of the data modules, and

wherein the entry in the destage data structure comprises:

information identifying the corresponding entry in the write cache;

information identifying the at least one of the control modules; and

the release indication.

18. The computer program product of claim 15

wherein the release data structure corresponds to a portion of the storage system, and

wherein the at least one processing device is further configured, responsive to a failure of the portion of the storage system, to clear entries found in the release data structure corresponding to the portion of the storage system.

19. The computer program product of claim 15 the program code when executed by at least one processing device further causes the at least one processing device:

to obtain, from a portion of the storage system that has restarted, a retransmission of the entry in write cache;

to determine whether or not the entry corresponding to the entry in the write cache is included in the destage data structure;

responsive to determining that the corresponding entry is included in the destage data structure, to set the release indication to the first value; and

responsive to determining that the corresponding entry is not included in the destage data structure, to indicate to the portion of the storage system that the data corresponding to the entry in the write cache has been destaged to one or more of the plurality of storage devices.

20. The computer program product of claim 19 wherein, responsive to the indication that the data corresponding to the entry in the write cache has been destaged to one or more of the plurality of storage devices, the portion of the storage system is configured to release the entry in the write cache.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 25, 2019
From: KAMRAN, LIOR; SHVEIDEL, VLADIMIR; KRAKOV, DAVID
To: EMC IP HOLDING COMPANY LLC
Reel/Frame 048685/0812 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
Continuity (1)
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