Methods and apparatuses for compensating for source voltage
Apparatuses and methods for compensating for source voltage are described. An example apparatus includes a source coupled to a memory cell and a read-write circuit coupled to the memory cell. The apparatus further includes a sense current generator coupled to a node of the source and to the read-write circuit, the sense current generator configured to control provision of a sense current by the read-write circuit responsive to a voltage of the node of the source.
1. An apparatus, comprising:
a read-write detection circuit configured to initiate detection of a sense signal in response to a flag; and
a flag signal generator comprising a capacitance and a discharge path, the flag signal generator configured to set the flag in response to a voltage differential between a source line coupled to a memory cell and a reference voltage exceeding a threshold.
2. The apparatus of claim 1 , wherein the read-write detection circuit is configured to detect a voltage of the sense signal.
3. The apparatus of claim 1 , wherein the read-write detection circuit is configured to detect a current of the sense signal.
4. The apparatus of claim 1 , wherein a discharge rate of the capacitance of the flag signal generator varies based on the voltage differential between the source line and the reference voltage.
5. The apparatus of claim 1 , wherein the discharge path comprises a first discharge path and a second discharge path, wherein the capacitance is discharged through the first discharge path when the source line voltage is approximately equal to the reference voltage, and wherein the capacitance is discharged through the second discharge path when the source line voltage is greater than the reference voltage.
6. The apparatus of claim 5 , wherein a discharge rate through the first path is less than a discharge rate through the second path.
7. The apparatus of claim 1 , further comprising the memory cell and the source line.
8. The apparatus of claim 1 , wherein the discharge path comprises a first discharge path and a second discharge path, the first discharge path includes a first transistor, and the second discharge path includes a second transistor.
9. The apparatus of claim 1 , wherein the flag signal generator is further configured to receive first and second bias voltage signals with respective voltage levels based on the source line voltage and the reference voltage, and
wherein a rate of discharge of the capacitance is based on the respective voltage levels of the first and second bias voltage signals.
10. The apparatus of claim 9 , wherein the flag signal generator further comprises first and second transistors configured to receive the first and second bias voltage signals, respectively.
11. An apparatus, comprising:
a flag signal generator comprising a capacitance and a discharge path, the flag signal generator configured to set a flag based on a voltage of a source line and a reference voltage; and
a read-write detection circuit configured to initiate detection of a sense signal based, at least in part, on the flag.
12. The apparatus of claim 11 , wherein the flag signal generator is further configured to set the flag based on a difference between the voltage of the source line and the reference voltage.
13. The apparatus of claim 12 , wherein the source line is coupled to a memory cell.
14. The apparatus of claim 13 , wherein the flag signal generator is further configured to set the flag in response to a voltage differential between the source line coupled to the memory cell and the reference voltage exceeding a threshold.
15. The apparatus of claim 11 , wherein the read-write detection circuit is configured to detect at least one of a voltage and a current of the sense signal.
16. The apparatus of claim 11 , wherein the discharge path comprises a first discharge path and a second discharge path, and wherein the capacitance is discharged through the first or second discharge path based on at least one of the source line voltage and the reference voltage.
17. An apparatus, comprising:
a flag signal generator comprising first and second discharge paths, the flag signal generator configured to set a flag based on a source line voltage received at the first discharge path and a reference voltage received at the second discharge path; and
a read-write detection circuit configured to initiate detection of a sense signal based, at least in part, on the flag.
18. The apparatus of claim 17 , wherein the flag signal generator further comprises a capacitance.
19. The apparatus of claim 18 , wherein a rate of discharge of the capacitance varies based on at least one of the source line voltage and the reference voltage.
20. The apparatus of claim 18 , wherein the capacitance is discharged through the first discharge path when the source line voltage is approximately equal to the reference voltage, and the capacitance is discharged through the second discharge path when the source line voltage is greater than the reference voltage.