IP Library Granted Patent US 11,006,442
Granted Patent B2
US 11,006,442 · App. 16/272,541 · Granted May 11, 2021

Method and apparatus for bandwidth part switch operations in mobile communications

Inventors: Abdellatif Salah (Cambridge, GB); Mohammed S Aleabe Al-Imari (Cambridge, GB); Ahmet Umut Ugurlu (Cambridge, GB)
Assignee: MediaTek Singapore Pte. Ltd.
H04W72/1289H04L5/0053H04W72/042H04W72/0446H04W72/1263
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Quick Facts
Patent No.
US 11,006,442
App. No.
16/272,541
Granted
May 11, 2021
Kind
B2
Abstract

Various solutions for bandwidth part (BWP) switch operations with respect to user equipment and network apparatus in mobile communications are described. An apparatus may receive a first downlink control information (DCI) to activate a BWP switch. The apparatus may cancel an uplink transmission or a downlink reception during a time duration. The apparatus may perform the BWP switch within the time duration.

Claims (60)

1. A method, comprising:

receiving, by a processor of an apparatus, a first downlink control information (DCI) to activate a bandwidth part (BWP) switch;

cancelling, by the processor, an uplink transmission or a downlink reception that is scheduled to be performed during a first slot of a plurality of slots;

performing, by the processor, the BWP switch within the first slot during a time duration of BWP delay that is adjacent to and before a boundary with a second slot of the plurality of slots which is subsequent the first slot; and

cancelling, by the processor, a scheduling DCI reception between receiving the first DCI and performing the BWP switch,

wherein the scheduling DCI schedules a physical uplink shared channel (PUSCH).

2. The method of claim 1 , further comprising:

receiving, by the processor, a second DCI scheduling a physical downlink shared channel (PDSCH) in the first slot performing the BWP switch,

wherein the second DCI is received before the first DCI.

3. The method of claim 1 , further comprising:

receiving, by the processor, a second DCI scheduling a physical downlink shared channel (PDSCH) in the first slot performing the BWP switch,

wherein the second DCI is received after the first DCI.

4. The method of claim 1 , further comprising:

cancelling, by the processor, the uplink transmission or the downlink reception between receiving the first DCI and performing the BWP switch.

5. The method of claim 1 , further comprising:

performing, by the processor, the uplink transmission or the downlink reception between receiving the first DCI and performing the BWP switch.

6. The method of claim 1 , further comprising:

receiving, by the processor, a second DCI scheduling a physical downlink shared channel (PDSCH) in a third slot of the plurality of slots after the BWP switch; and

discarding, by the processor, the second DCI.

7. The method of claim 1 , further comprising:

transmitting, by the processor, a service request (SR).

8. The method of claim 1 , further comprising:

receiving, by the processor, a physical downlink shared channel (PDSCH) before receiving the first DCI; and

cancelling, by the processor, an acknowledgement transmission between receiving the first DCI and performing the BWP switch.

9. The method of claim 1 , further comprising:

cancelling, by the processor, the uplink transmission between receiving the first DCI and performing the BWP switch; and

postponing, by the processor, the uplink transmission to a new BWP.

10. The method of claim 1 , further comprising:

reporting, by the processor, a BWP switch delay to a network node.

11. An apparatus, comprising:

a transceiver capable of wirelessly communicating with a network node of a wireless network; and

a processor communicatively coupled to the transceiver, the processor capable of:

receiving, via the transceiver, a first downlink control information (DCI) to activate a bandwidth part (BWP) switch;

cancelling an uplink transmission or a downlink reception that is scheduled to be performed during a first slot of a plurality of slots; and

performing the BWP switch within the first slot during a time duration of BWP delay that is adjacent to and before a boundary with a second slot of the plurality of slots which is subsequent the first slot; and

cancelling a scheduling DCI reception between receiving the first DCI and performing the BWP switch,

wherein the scheduling DCI schedules a physical uplink shared channel (PUSCH).

12. The apparatus of claim 11 , wherein the processor is further capable of:

receiving, via the transceiver, a second DCI scheduling a physical downlink shared channel (PDSCH) in the first slot performing the BWP switch,

wherein the second DCI is received before the first DCI.

13. The apparatus of claim 11 , wherein the processor is further capable of:

receiving, via the transceiver, a second DCI scheduling a physical downlink shared channel (PDSCH) in the first slot performing the BWP switch,

wherein the second DCI is received after the first DCI.

14. The apparatus of claim 11 , wherein the processor is further capable of:

cancelling the uplink transmission or the downlink reception between receiving the first DCI and performing the BWP switch.

15. The apparatus of claim 11 , wherein the processor is further capable of:

performing, via the transceiver, the uplink transmission or the downlink reception between receiving the first DCI and performing the BWP switch.

16. The apparatus of claim 11 , wherein the processor is further capable of:

receiving, via the transceiver, a second DCI scheduling a physical downlink shared channel (PDSCH) in a third slot of the plurality of slots after the BWP switch; and

discarding the second DCI.

17. The apparatus of claim 11 , wherein the processor is further capable of:

transmitting, via the transceiver, a service request (SR).

18. The apparatus of claim 11 , wherein the processor is further capable of:

receiving, via the transceiver, a physical downlink shared channel (PDSCH) before receiving the first DCI; and

cancelling an acknowledgement transmission between receiving the first DCI and performing the BWP switch.

19. The apparatus of claim 11 , wherein the processor is further capable of:

cancelling the uplink transmission between receiving the first DCI and performing the BWP switch; and

postponing the uplink transmission to a new BWP.

20. The apparatus of claim 11 , wherein the processor is further capable of:

reporting, via the transceiver, a BWP switch delay to the network node.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2026
From: MEDIATEK SINGAPORE PTE LTD.
To: HFI INNOVATION INC.
Reel/Frame 075050/0209 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 11, 2019
From: SALAH, ABDELLATIF; AL-IMARI, MOHAMMED S ALEABE; UGURLU, AHMET UMUT
To: MEDIATEK SINGAPORE PTE. LTD.
Reel/Frame 048296/0424 →
Continuity (2)
Provisional Application 62629738 · Feb 13, 2018
Related Publication 20190254056A1 · Aug 15, 2019
Cited By (2)
US 12,219,392 US 12,301,511