IP Library Granted Patent US 11,222,874
Granted Patent B2
US 11,222,874 · App. 16/273,579 · Granted Jan 11, 2022

Discontinuous patterned bonds for semiconductor devices and associated systems and methods

Inventors: Scott D. Schellhammer (Meridian, ID); Vladimir Odnoblyudov (Danville, CA); Jeremy S. Frei (Boise, ID)
Assignee: Micron Technology, Inc.
H01L25/0753H01L21/187H01L21/2007H01L21/447H01L23/49513H01L24/04H01L24/06H01L24/83H01L24/94H01L24/97H01L33/0066H01L33/0093H01L33/0095H01L33/486H01L33/62H01L24/32H01L2224/32225H01L2224/32245H01L2224/83001H01L2224/83005H01L2224/8314H01L2224/83121H01L2224/83193H01L2924/12041H01L2924/12042
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Quick Facts
Patent No.
US 11,222,874
App. No.
16/273,579
Granted
Jan 11, 2022
Kind
B2
Abstract

Discontinuous bonds for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a first substrate and a second substrate, with at least one of the first substrate and the second substrate having a plurality of solid-state transducers. The second substrate can include a plurality of projections and a plurality of intermediate regions and can be bonded to the first substrate with a discontinuous bond. Individual solid-state transducers can be disposed at least partially within corresponding intermediate regions and the discontinuous bond can include bonding material bonding the individual solid-state transducers to blind ends of corresponding intermediate regions. Associated methods and systems of discontinuous bonds for semiconductor devices are disclosed herein.

Claims (24)

1. A method for fabricating a semiconductor device, the method comprising:

forming a plurality of solid-state transducers on a common device substrate by forming a pattern of trenches in a transducer structure to separate the plurality of solid-state transducers from one another, the pattern of trenches extending to the common device substrate;

forming a plurality of protrusions in a carrier substrate, the plurality of protrusions defining a plurality of recesses; and

bonding the carrier substrate to the common device substrate by positioning the plurality of solid-state transducers in corresponding ones of the plurality of recesses, respectively.

2. The method of claim 1 , wherein bonding the carrier substrate to the device substrate comprises positioning the plurality of protrusions in the pattern of trenches.

3. The method of claim 1 , wherein the plurality of recesses define a pattern of recesses.

4. The method of claim 3 , wherein the pattern of recesses is the inverse of the pattern of trenches.

5. The method of claim 3 , wherein bonding the carrier substrate to the device substrate comprises aligning the pattern of recesses with the pattern of trenches.

6. The method of claim 1 , further comprising bonding the carrier substrate to the device substrate with a discontinuous bond, wherein the discontinuous bond comprises a bonding material between individual solid-state transducers and blind ends of corresponding individual recesses.

7. The method of claim 6 , further comprising forming individual segments of the discontinuous bond by bonding the individual solid-state transducers to the blind ends of the corresponding recesses with the bonding material.

8. The method of claim 6 , further comprising restricting the bonding material from flowing across the carrier substrate by confining the bonding material to the plurality of recesses.

9. The method of claim 1 , further comprising removing the device substrate without removing the plurality of solid-state transducers.

10. The method of claim 1 , further comprising dicing the carrier substrate along the plurality of protrusions to form a plurality of individual semiconductor devices.

11. The method of claim 1 , further comprising elevating a temperature of the carrier substrate and the device substrate while bonding the carrier substrate to the device substrate.

12. The method of claim 1 , further comprising positioning at least one of the plurality of protrusions directly adjacent to a portion of the device substrate.

13. A method for fabricating a semiconductor device, the method comprising:

forming a plurality of solid-state transducers in a first pattern on a device substrate by forming trenches in a transducer structure to separate the plurality of solid-state transducers from one another, the trenches extending to the device substrate;

forming a carrier substrate with a plurality of protrusions in a second pattern; and

bonding the carrier substrate to the device substrate by aligning the first pattern and the second pattern.

14. The method of claim 13 , wherein the second pattern includes a pattern of recesses.

15. The method of claim 13 , wherein the first pattern is the inverse of the second pattern.

16. The method of claim 13 , further comprising bonding the carrier substrate to the device substrate with a bonding material.

17. The method of claim 13 , further comprising removing the device substrate without removing the plurality of solid-state transducers.

18. The method of claim 13 , further comprising dicing the carrier substrate along the plurality of protrusions to form a plurality of individual semiconductor devices.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 15, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051041/0317 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050724/0392 →
SUPPLEMENT NO. 12 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048948/0677 →
SUPPLEMENT NO. 3 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 048951/0902 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2019
From: SCHELLHAMMER, SCOTT D.; ODNOBLYUDOV, VLADIMIR; FREI, JEREMY S.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 048309/0819 →