IP Library › Granted Patent US 11,478,822
Granted Patent B2
US 11,478,822 · App. 16/274,456 · Granted Oct 25, 2022

Wafer level ultrasonic chip module having suspension structure and manufacturing method thereof

Inventors: Yu-Feng Jin (Shenzhen, CN); Sheng-Lin Ma (Shenzhen, CN); Qian-Cheng Zhao (Shenzhen, CN); Yi-Hsiang Chiu (Taipei, TW); Huan Liu (Shenzhen, CN); Hung-Ping Lee (Taipei, TW); Dan Gong (Shenzhen, CN)
Assignees: J-Metrics Technology Co., Ltd.; Peking University Shenzhen Graduate School
B06B1/0662H01L41/0477H01L41/31Y10T29/42
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Quick Facts
Patent No.
US 11,478,822
App. No.
16/274,456
Granted
Oct 25, 2022
Kind
B2
Abstract

A wafer level ultrasonic chip module includes a substrate, a composite layer and a base material. The substrate has a through slot passing through an upper surface and a lower surface of the substrate. The composite layer includes an ultrasonic body and a protective layer. A lower surface of the ultrasonic body is exposed from the through slot. The protective layer covers the ultrasonic body and a partial upper surface of the substrate. The composite layer has a groove passing through an upper surface and a lower surface of the protective layer, and communicating with the through slot. The ultrasonic body corresponds to the through slot. The base material covers the through slot, such that a space is formed among the through slot, the lower surface of the ultrasonic body and an upper surface of the base material.

Claims (28)

1. A manufacturing method of a wafer level ultrasonic chip module having a suspension structure, comprising:

forming an ultrasonic body on a substrate, the ultrasonic body comprising a first piezoelectric layer, a first electrode, a second piezoelectric layer and a second electrode sequentially stacked on the substrate, wherein the second piezoelectric layer and the second electrode do not cover a partial upper surface of the first electrode;

forming a first protective material layer on an upper surface of the ultrasonic body and an upper surface of the substrate;

patterning the first protective material layer to form a first protective layer, the first protective layer comprising two circuit predetermined areas and a removal structure predetermined area, wherein the two circuit predetermined areas expose the partial upper surface of the first electrode and a partial upper surface of the second electrode respectively, and the removal structure predetermined area surrounds a portion of a periphery of the ultrasonic body and exposes a partial upper surface of the substrate;

forming a conductive material layer on an upper surface of the first protective layer, the two circuit predetermined areas and the removal structure predetermined area to form a circuit layer, two electrode circuits and a removal structure;

forming a second protective layer on the circuit layer, the two electrode circuits and the removal structure;

removing a partial second protective layer, the removal structure and a partial substrate from an upper surface, corresponding to the removal structure, of the second protective layer;

removing a partial substrate corresponding to the ultrasonic body from a lower surface of the substrate to the upper surface of the substrate to expose a lower surface of the ultrasonic body; and

forming a base material on the lower surface of the substrate, such that a space is formed between the lower surface of the ultrasonic body and an upper surface of the base material.

2. The manufacturing method of the wafer level ultrasonic chip module having a suspension structure according to claim 1 , wherein the step of forming an ultrasonic body on a substrate comprises:

sequentially forming a first piezoelectric material layer, a first electrode material layer, a second piezoelectric material layer and a second electrode material layer on the substrate; and

partially removing the first piezoelectric material layer, the first electrode material layer, the second piezoelectric material layer and the second electrode material layer to form the first piezoelectric layer, the first electrode, the second piezoelectric layer and the second electrode, wherein the second piezoelectric layer and the second electrode expose a partial upper surface of the first electrode.

3. The manufacturing method of the wafer level ultrasonic chip module having a suspension structure according to claim 1 , further comprising:

grinding, after forming a second protective layer on an upper surface of the conductive material layer, the lower surface of the substrate to thin the substrate.

4. The manufacturing method of the wafer level ultrasonic chip module having a suspension structure according to claim 1 , wherein the removing a partial second protective layer, the removal structure and a partial substrate from an upper surface, corresponding to the removal structure, of the second protective layer comprises:

removing a partial second protective layer from an upper surface, corresponding to the removal structure, of the second protective layer to form an upper groove, wherein the removal structure is exposed from the upper groove;

removing the removal structure from the upper groove to form a middle groove, wherein the middle groove communicates with the upper groove and exposes the upper surface of the substrate; and

removing a partial substrate from the middle groove to form a lower groove communicating with the middle groove.

5. The manufacturing method of the wafer level ultrasonic chip module having a suspension structure according to claim 1 , further comprising:

cutting the circuit layer and the substrate to expose a side surface of the circuit layer and a side surface of the substrate;

forming a conductor layer from the side surface of the circuit layer to a lower surface of the base material; and

forming at least one pad on the conductor layer, wherein the conductor layer electrically connects the circuit layer and the pad.

6. The manufacturing method of the wafer level ultrasonic chip module having a suspension structure according to claim 1 , further comprising:

after the removing a partial second protective layer, the removal structure and a partial substrate from an upper surface, corresponding to the removal structure, of the second protective layer, removing a partial second protective layer to expose a partial upper surface of the ultrasonic body so as to form an opening; and

covering a carrier plate to shield the upper surface of the second protective layer, a groove passing through the first protective layer and the second protective layer and the opening.

7. The manufacturing method of the wafer level ultrasonic chip module having a suspension structure according to claim 6 , further comprising:

removing the carrier plate after the forming a base material on the lower surface of the substrate to form the space; and

filling a conducting material in the opening.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 10, 2023
From: J-METRICS TECHNOLOGY CO., LTD.
To: SONICMEMS (ZHENGZHOU) TECHNOLOGY CO.,LTD.
Reel/Frame 063600/0340 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 26, 2023
From: J-METRICS TECHNOLOGY CO., LTD.
To: SONICMEMS (ZHENGZHOU) TECHNOLOGY CO.,LTD
Reel/Frame 063445/0963 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 13, 2019
From: JIN, YU-FENG; MA, SHENG-LIN; ZHAO, QIAN-CHENG; CHIU, YI-HSIANG; LIU, HUAN; LEE, HUNG-PING; GONG, DAN
To: J-METRICS TECHNOLOGY CO., LTD.; PEKING UNIVERSITY SHENZHEN GRADUATE SCHOOL
Reel/Frame 048320/0063 →
Priority Claims (1)
CN 201811429713.4 · Nov 28, 2018 · national
Continuity (1)
Related Publication 20200164406A1 · May 28, 2020