IP Library Granted Patent US 10,796,826
Granted Patent B2
US 10,796,826 · App. 16/284,592 · Granted Oct 6, 2020

Resistor with temperature coefficient of resistance (TCR) compensation

Inventors: Clark L. Smith (Columbus, NE); Thomas L. Bertsch (Norfolk, NE); Todd L. Wyatt (Columbus, NE); Thomas L. Veik (Columbus, NE)
Assignee: VISHAY DALE ELECTRONICS, LLC
H01C7/06G01R1/203G01R19/0092G01R19/32H01C1/00H01C1/148H01C17/232H01C17/28Y10T29/49082Y10T29/49101
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Quick Facts
Patent No.
US 10,796,826
App. No.
16/284,592
Granted
Oct 6, 2020
Kind
B2
Abstract

A current sense resistor and a method of manufacturing a current sensing resistor with temperature coefficient of resistance (TCR) compensation are disclosed. The resistor has a resistive strip disposed between two conductive strips. A pair of main terminals and a pair of voltage sense terminals are formed in the conductive strips. A pair of rough TCR calibration slots is located between the main terminals and the voltage sense terminals, each of the rough TCR calibration slots have a depth selected to obtain a negative starting TCR value observed at the voltage sense terminals. A fine TCR calibration slot is formed between the pair of voltage sense terminals.

Claims (33)

1. A resistor with temperature coefficient of resistance (TCR) compensation, the resistor comprising:

a resistive strip disposed between a first conductive strip and a second conductive strip;

a first voltage sense terminal and a first main terminal formed in the first conductive strip separated by a first slot at an outer edge of the first conductive strip;

a second voltage sense terminal and a second main terminal formed in the second conductive strip separated by a second slot at an outer edge of the second conductive strip, the outer edge of the first conductive strip and the outer edge of the second conductive strip being on opposite sides of the resistor;

a third slot formed at an edge of the resistive strip between the first and second voltage sense terminals; and,

a fourth slot formed in the resistive strip between the first and second main terminals,

wherein the first and second slots are configured to obtain a first TCR value observed at the first and second voltage sense terminals, wherein the third slot is configured to obtain a second TCR value observed at the first and second voltage sense terminals, and wherein the first TCR value and the second TCR value are different.

2. The resistor of claim 1 , wherein the first slot has a depth that extends across the first conductive strip and the second slot has a depth that extends across the second conductive strip.

3. The resistor of claim 2 , wherein the first slot has an opening at the outer edge of the first conductive strip opposite the resistive strip, and the second slot has an opening at the outer edge of the second conductive strip opposite the resistive strip.

4. The resistor of claim 1 , wherein the fourth slot is formed at an edge of the resistive strip.

5. The resistor of claim 1 , wherein the first voltage sense terminal and the first main terminal are formed contiguously in the first conductive strip, and wherein the second voltage sense terminal and the second main terminal are formed contiguously in the second conductive strip.

6. The resistor of claim 1 , wherein the third slot does not meet either the first slot or the second slot.

7. The resistor of claim 1 , wherein a depth of the first slot and the second slot adjust a TCR value of the resistor.

8. The resistor of claim 7 , wherein a depth of the third slot adjusts a TCR value of the resistor.

9. The resistor of claim 1 , wherein each of the first and second slots has a depth selected to obtain a negative starting TCR value observed at the first and second voltage sense terminals, and wherein the third slot has a depth selected to obtain a TCR value observed at the first and second voltage sense terminals that approaches zero.

10. The resistor of claim 1 , wherein at least a portion of the third slot extends only between the first voltage sense terminal and the second voltage sense terminal.

11. A method of manufacturing a resistor with temperature coefficient of resistance (TCR) compensation, the method comprising:

disposing a resistive strip between a first conductive strip and a second conductive strip;

forming a first slot at an outer edge of the first conductive strip to form a first voltage sense terminal and a first main terminal in the first conductive strip;

forming a second slot at an outer edge of the second conductive strip to form a second voltage sense terminal and a second main terminal in the second conductive strip, the outer edge of the first conductive strip and the outer edge of the second conductive strip being on opposite sides of the resistor;

forming a third slot at an edge of the resistive strip between the first and second voltage sense terminals;

forming a fourth slot in the resistive strip between the first and second main terminals;

configuring the first and second slots to obtain a first TCR value observed at the first and second voltage sense terminals; and

configuring the third slot to obtain a second TCR value observed at the first and second voltage sense terminals, wherein the first TCR value and the second TCR value are different.

12. The method of claim 11 , wherein the first slot has a depth that extends across the first conductive strip and the second slot has a depth that extends across the second conductive strip.

13. The method of claim 12 , wherein the first slot is formed having an opening at the outer edge of the first conductive strip opposite the resistive strip, and the second slot is formed having an opening at the outer edge of the second conductive strip opposite the resistive strip.

14. The method of claim 11 , wherein the fourth slot is formed at an edge of the resistive strip.

15. The method of claim 11 , wherein the first voltage sense terminal and the first main terminal are formed contiguously in the first conductive strip, and wherein the second voltage sense terminal and the second main terminal are formed contiguously in the second conductive strip.

16. The method of claim 11 , wherein the third slot is formed such that it does not meet either the first slot or the second slot.

17. The method of claim 11 , wherein a depth of the first slot and the second slot adjust a TCR value of the resistor.

18. The method of claim 17 , wherein a depth of the third slot adjusts a TCR value of the resistor.

19. The method of claim 11 , wherein each of the first and second slots has a depth selected to obtain a negative starting TCR value observed at the first and second voltage sense terminals, and wherein the third slot has a depth selected to obtain a TCR value observed at the first and second voltage sense terminals that approaches zero.

20. The method of claim 11 , wherein the third slot is formed such that at least a portion of the third slot extends only between the first voltage sense terminal and the second voltage sense terminal.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2020
From: SMITH, CLARK L.; BERTSCH, THOMAS L.; WYATT, TODD L.; VEIK, THOMAS L.
To: VISHAY DALE ELECTRONICS, INC.
Reel/Frame 053577/0568 →
CHANGE OF NAME Recorded Aug 24, 2020
From: VISHAY DALE ELECTRONICS, INC.
To: VISHAY DALE ELECTRONICS, LLC
Reel/Frame 053588/0645 →
SECURITY INTEREST Recorded Jun 12, 2019
From: VISHAY DALE ELECTRONICS, INC.; DALE ELECTRONICS, INC.; VISHAY DALE ELECTRONICS, LLC; VISHAY-DALE, INC.; VISHAY INTERTECHNOLOGY, INC.; SILICONIX INCORPORATED; VISHAY-SILICONIX, INC.; VISHAY-SILICONIX; VISHAY SPRAGUE, INC.; VISHAY EFI, INC.; SPRAGUE ELECTRIC COMPANY; VISHAY GENERAL SEMICONDUCTOR, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 049440/0876 →