IP Library › Granted Patent US 11,037,289
Granted Patent B2
US 11,037,289 · App. 16/285,765 · Granted Jun 15, 2021

Method and system for scanning wafer

Inventors: Pei-Hsuan Lee (Taipei, TW); Chien-Hsiang Huang (Hsinchu, TW); Kuang-Shing Chen (Hsinchu, TW); Kuan-Hsin Chen (Hsinchu, TW); Chun-Chieh Chin (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
G06T7/0006G06T7/70G06T2207/10061G06T2207/20081G06T2207/30148G06T2207/30204
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Quick Facts
Patent No.
US 11,037,289
App. No.
16/285,765
Granted
Jun 15, 2021
Kind
B2
Abstract

The present disclosure provides a method and a system for scanning wafer. The system captures a defect image of a wafer, and generates a reference image corresponding to the first defect image based on a reference image generation model. The system generates a defect marked image based on the defect image and the reference image.

Claims (56)

1. A method, comprising:

providing a wafer;

capturing a defect image of the wafer;

determining a first design pattern image corresponding to the defect image based on a design pattern data;

generating a first reference image corresponding to the defect image based on the first design pattern image and a reference image generation model; and

generating a first defect marked image based on the defect image and the first reference image.

2. The method of claim 1 , further comprising:

detecting a defect of the wafer; and

determining a position of the defect;

wherein the defect image is captured according to the position of the defect.

3. The method of claim 1 , further comprising:

establishing the reference image generation model based on at least one second design pattern image and at least one second reference image corresponding to the at least one second design pattern image.

4. The method of claim 1 , further comprising:

determining a first image histogram data of the defect image;

wherein the first reference image is generated based on the first design pattern image, the first histogram image data and the reference image generation model.

5. The method of claim 4 , further comprising:

establishing the reference image generation model based on at least one second design pattern image, at least one second reference image corresponding to the at least one second design pattern image, and at least one second image histogram data of the at least one second reference image.

6. The method of claim 1 , further comprising:

generating information of the defect of the wafer based on the first defect marked image and a defect determination model.

7. The method of claim 6 , further comprising:

establishing the defect determination model based on at least one second defect marked image and information of defect corresponding to the at least one second defect marked image.

8. The method of claim 6 , further comprising:

generating a first grayscale image and a second grayscale image based on capturing the defect image;

wherein the information of the defect of the wafer is generated based on the first defect marked image, the first grayscale image, the second grayscale image and the defect determination model.

9. The method of claim 8 , further comprising:

establishing the defect determination model based on at least one second defect marked image, at least one third grayscale image corresponding to the at least one second defect marked image, at least one fourth grayscale image corresponding to the at least one second defect marked image, and information of defect corresponding to the at least one second defect marked image.

10. A method comprising:

obtaining an image of a wafer, wherein the image comprises a defect of the wafer;

generating a first design pattern image corresponding to the image based on a design pattern data;

applying a reference image generation model to the first design pattern image to generate a first reference image corresponding to the image of the wafer; and

deriving a first defect marked image by comparing the image and the first reference image.

11. The method of claim 10 , wherein the reference image generation model is trained based on a machine learning scheme with training data of a plurality of second design pattern images and a plurality of second reference images corresponding to the plurality of second design pattern images.

12. The method of claim 10 , further comprising:

scanning the wafer for detecting the defect;

determining a position of the defect;

capturing the image based on the position of the defect.

13. The method of claim 10 , wherein generating the first design pattern image further comprises:

comparing the image with a design layout of the wafer;

generating the first design pattern image by matching the image with part of the design layout.

14. The method of claim 10 , wherein deriving the first marked image further comprises:

deriving the first defect marked image by subtracting the image from the first reference image.

15. The method of claim 10 , further comprising:

applying a defect determination model to the first defect marked image to generate information of the defect of the wafer.

16. The method of claim 15 , wherein the defect determination model is trained based on a machine learning scheme with training data of a plurality of second defect marked image and information of defect which correspond to the plurality of second defect marked image.

17. A system, comprising:

a storage unit, being configured to store a reference image generation model;

an image capturing device, being configured to capture an image of a wafer; and

a processor, being connected to the storage unit and the image capturing device electrically and configured to:

generate a first design pattern image corresponding to the image of the wafer based on a design pattern data;

input the first design pattern image to the reference image generation model for outputting a reference image corresponding to the image of the wafer; and

process the image of the wafer and the reference image for deriving a defect marked image.

18. The system of claim 17 , further comprising:

a defect inspection device, being connected to the processor electrically and configured to scan the wafer for detecting a defect of the wafer, wherein the image comprises the defect.

19. The system of claim 17 , wherein the storage unit is further configured to store a defect determination model, and the processor is further configured to input the defect marked image to the defect determination model and output information of the defect of the wafer from the defect determination model based on the defect marked image.

20. The system of claim 17 , wherein the processor is further configured to:

establish the reference image generation model based on a plurality of second design pattern images and a plurality of reference image corresponding to plurality of second design pattern images.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 26, 2019
From: LEE, PEI-HSUAN; HUANG, CHIEN-HSIANG; CHEN, KUANG-SHING; CHEN, KUAN-HSIN; CHIN, CHUN-CHIEH
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Reel/Frame 048440/0961 →
Continuity (2)
Provisional Application 62751047 · Oct 26, 2018
Related Publication 20200134810A1 · Apr 30, 2020