Electro-absorption modulator
An optoelectronic device comprising: a silicon-on-insulator (SOI) substrate, the substrate comprising: a silicon support layer; a buried oxide (BOX) layer on top of the silicon support layer; and a silicon device layer on top of the BOX layer; a waveguide region, where a portion of the silicon device layer and a portion of the BOX layer underneath the portion of the device layer have been removed, the portion of the BOX layer having been replaced with a layer of silicon and a layer of crystalline oxide on top of the silicon; and a waveguide structure located directly on top of the crystalline oxide layer, the waveguide structure including a P doped region, and an N doped region with an intrinsic region in-between, creating a PIN junction across which a bias can be applied to create a modulation region.
1. An electro-absorption modulator (EAM), the EAM comprising:
a silicon-on-insulator (SOI) substrate, the substrate comprising: a silicon support layer; a buried oxide (BOX) layer on top of the silicon support layer; and a silicon device layer on top of the BOX layer;
a waveguide region, where a portion of the silicon device layer and a portion of the BOX layer underneath the portion of the silicon device layer have been removed, the portion of the BOX layer having been replaced with a replacement silicon layer and a crystalline oxide layer on top of the replacement silicon layer; and
a waveguide structure located directly on top of the crystalline oxide layer, the waveguide structure including a P doped region, and an N doped region with an intrinsic region in-between, creating a PIN junction across which a bias can be applied to create a modulation region.
2. The EAM of claim 1 , wherein the waveguide structure is made of one or more of the following materials:
SiGeSn, SiGe, InGaAs, AlInGaAs and InGaAsP.
3. The EAM of claim 1 , wherein the crystalline oxide layer has a thickness of 20 nm-400 nm.
4. The EAM of claim 1 , wherein the silicon support layer is Si(111), and the replacement silicon layer is Si(111).
5. The EAM of claim 1 , wherein the waveguide structure is a rib waveguide which comprises:
a waveguide ridge on a slab, with a first slab portion on a first side of the waveguide ridge, and a second slab portion on a second side of the waveguide ridge; and
wherein the waveguide ridge, first slab portion and second slab portion are all formed of the same material as one another.
6. The EAM of claim 5 , wherein the P doped region is located at the first slab portion and the N doped region is located at the second slab portion.
7. The EAM of claim 6 , wherein the P doped region extends into a first sidewall of the waveguide ridge and/or wherein the N doped region extends into a second sidewall of the waveguide ridge.
8. The EAM of claim 6 , further comprising a first metal contact at the first slab portion, in electrical connection with the P doped region and a second metal contact at the second slab portion, in electrical connection with the N doped region.
9. The EAM of claim 1 , wherein the SOI substrate is a 3 μm SOI platform.
10. The EAM of claim 1 , wherein the waveguide structure is made of one or more of the following materials:
SiGe multiple quantum well (SiGe MQW), AlInGaAs MQW, InGaAsP MQW and InGaNAs MQW.
11. The EAM of claim 10 , wherein the SOI substrate is a 1 μm SOI platform.
12. A method of fabricating an electro-absorption modulator (EAM), the method comprising:
providing a silicon-on-insulator substrate, the substrate comprising: a silicon support layer; a buried oxide (BOX) layer on top of the silicon support layer; and a silicon device layer on top of the BOX layer;
etching through a portion of the silicon device layer and the BOX layer to create a cavity in the substrate which exposes a portion of the silicon support layer;
epitaxially growing a replacement layer of silicon on top of the exposed portion of the silicon support layer;
epitaxially growing a crystalline oxide layer on top of the replacement layer of silicon, the replacement layer of silicon and the crystalline oxide layer replacing the portion of the BOX layer that had been etched away;
epitaxially growing a layer of a first material on top of the crystalline oxide layer; and
fabricating a waveguide structure within the layer of the first material, the waveguide structure including a P doped region, and an N doped region with an intrinsic region in-between, creating a PIN junction across which a bias can be applied to function as a modulation region.
13. The method of claim 12 , wherein the first material is one or more of the following materials:
SiGeSn, SiGe, InGaAs, AlInGaAs, InGaAsP, SiGe multiple quantum well (SiGe MQW), AlInGaAs MQW InGaAsP MQW and InGaNAs MQW.
14. The method of claim 12 , wherein the step of fabricating the waveguide structure comprises:
etching the layer of the first material to form a rib waveguide of the first material, the rib waveguide including a ridge on a slab, the slab comprising a first slab portion on a first side of the ridge, and a second slab portion on a second side of the ridge.
15. The method of claim 14 , wherein the P doped region is located at the first slab portion and the N doped region is located at the second slab portion.
16. The method of claim 15 , wherein the P doped region extends into a first sidewall of the ridge and/or wherein the N doped region extends into a second sidewall of the ridge.
17. The method of claim 12 , wherein the silicon support layer is Si(111); and the replacement layer of silicon is Si(111).