Memory system and method of controlling nonvolatile memory
According to one embodiment, a memory system includes a nonvolatile memory and a memory controller. The nonvolatile memory includes a memory string including memory cells including first to third memory cells, and a selection transistor connected to the memory cells, and first to third word lines that are connected to gates of the first to third memory cells of the memory string. The memory controller reads data of the first to third memory cells by applying first to third read voltages to the first to third word lines, respectively. The memory controller reads second data by applying a fourth read voltage to the second word line in parallel to processing of decoding first data, obtains likelihood information on the basis of the first data, the second data, and at least one of the third data and the fourth data, and decodes data on the basis of the likelihood information.
1. A memory system, comprising:
a nonvolatile memory including,
a memory string that includes a plurality of memory cells including a first memory cell, a second memory cell, and a third memory cell that are connected in series, and a selection transistor that is electrically connected to the plurality of memory cells in series,
a bit line that is connected to the memory string,
a first word line that is electrically connected to a gate of the first memory cell of the memory string,
a second word line that is electrically connected to a gate of the second memory cell of the memory string, and
a third word line that is electrically connected to a gate of the third memory cell of the memory string; and
a memory controller configured to read data of the first memory cell by causing the nonvolatile memory to apply a first read voltage to the first word line, to read data of the second memory cell by causing the nonvolatile memory to apply a second read voltage to the second word line, and to read data of the third memory cell by causing the nonvolatile memory to apply a third read voltage to the third word line,
wherein the memory controller is configured to read data of the second memory cell by causing the nonvolatile memory to apply a fourth read voltage that is varied from the second read voltage to the second word line, in parallel to processing of decoding first data that is read data by the second read voltage, and
the memory controller is configured to obtain likelihood information by using a table selected from a plurality of tables in which pieces of the likelihood information, which are different from each other, are determined with respect to the first data, second data that is read data by the fourth read voltage, and at least one of third data that is read data by the first read voltage and fourth data that is read data by the third read voltage, to decode data read from the second memory cell on the basis of the likelihood information.
2. The memory system according to claim 1 ,
wherein the memory controller obtains the likelihood information by using a first table among the plurality of tables, decodes data that is read from the second memory cell by using the likelihood information that is obtained, and further obtains the likelihood information by using a second table different from the first table among the plurality of tables when decoding fails.
3. A memory system, comprising:
a nonvolatile memory including,
a memory string that includes a plurality of memory cells including a first memory cell, a second memory cell, and a third memory cell that are connected in series, and a selection transistor that is electrically connected to the plurality of memory cells in series,
a bit line that is connected to the memory string,
a first word line that is electrically connected to a gate of the first memory cell of the memory string,
a second word line that is electrically connected to a gate of the second memory cell of the memory string, and
a third word line that is electrically connected to a gate of the third memory cell of the memory string; and
a memory controller configured to read data of the first memory cell by causing the nonvolatile memory to apply a first read voltage to the first word line, to read data of the second memory cell by causing the nonvolatile memory to apply a second read voltage to the second word line, and to read data of the third memory cell by causing the nonvolatile memory to apply a third read voltage to the third word line,
wherein the memory controller is configured to read data of the second memory cell by causing the nonvolatile memory to apply a fourth read voltage that is varied from the second read voltage to the second word line, in parallel to processing of decoding first data that is read data by the second read voltage, and
the memory controller is configured to obtain likelihood information on the basis of the first data, second data that is read data by the fourth read voltage, and at least one of third data that is read data by the first read voltage and fourth data that is read data by the third read voltage, to decode data read from the second memory cell on the basis of the likelihood information,
wherein the memory controller includes a plurality of decoding units that obtain the likelihood information by using any one among a plurality of tables in which pieces of the likelihood information, which are different from each other, are determined with respect to the first data, the second data, and at least one of the third data and the fourth data, and decode data that is read from the second memory cell by using the likelihood information that is obtained.
4. The memory system according to claim 1 ,
wherein the memory controller reads a plurality of pieces of the second data from the second memory cell by using a plurality of the second read voltages including one or more read voltages in which a difference from the first read voltage is a first differential value, and one or more read voltage in which a difference from the first read voltage is a second differential value.
5. The memory system according to claim 1 ,
wherein the memory controller,
reads a plurality of the third data from the first memory cell by using a plurality of the first read voltages, and
reads a plurality of the fourth data from the third memory cell by using a plurality of the third read voltages.
6. The memory system according to claim 1 , wherein
the third data is information indicating whether or not a threshold voltage of the first memory cell is greater than the first read voltage, and
the fourth data is information indicating whether or not a threshold voltage of the third memory cell is greater than the third read voltage.
7. The memory system according to claim 3 ,
wherein the memory controller obtains the likelihood information by using a first table among the plurality of tables, decodes data that is read from the second memory cell by using the likelihood information that is obtained, and further obtains the likelihood information by using a second table different from the first table among the plurality of tables when decoding fails.
8. The memory system according to claim 3 ,
wherein the memory controller reads a plurality of pieces of the second data from the second memory cell by using a plurality of the second read voltages including one or more read voltages in which a difference from the first read voltage is a first differential value, and one or more read voltage in which a difference from the first read voltage is a second differential value.
9. The memory system according to claim 3 ,
wherein the memory controller,
reads a plurality of the third data from the first memory cell by using a plurality of the first read voltages, and
reads a plurality of the fourth data from the third memory cell by using a plurality of the third read voltages.
10. The memory system according to claim 3 , wherein
the third data is information indicating whether or not a threshold voltage of the first memory cell is greater than the first read voltage, and
the fourth data is information indicating whether or not a threshold voltage of the third memory cell is greater than the third read voltage.
11. A method of controlling a nonvolatile memory, the nonvolatile memory including:
a memory string that includes a plurality of memory cells including a first memory cell, a second memory cell, and a third memory cell that are connected in series, and a selection transistor that is electrically connected to the plurality of memory cells in series;
a bit line that is connected to the memory string;
a first word line that is electrically connected to a gate of the first memory cell of the memory string;
a second word line that is electrically connected to a gate of the second memory cell of the memory string; and
a third word line that is electrically connected to a gate of the third memory cell of the memory string,
the method comprising:
reading data of the first memory cell by causing the nonvolatile memory to apply a first read voltage to the first word line;
reading data of the second memory cell by causing the nonvolatile memory to apply a second read voltage to the second word line;
reading data of the third memory cell by causing the nonvolatile memory to apply a third read voltage to the third word line;
reading data of the second memory cell by causing the nonvolatile memory to apply a fourth read voltage that is varied from the second read voltage to the second word line, in parallel to processing of decoding first data that is read data by the second read voltage;
obtaining likelihood information on the basis of the first data, second data that is read data by the fourth read voltage, and at least one of third data that is read data by the first read voltage and fourth data that is read data by the third read voltage; and
decoding data read from the second memory cell on the basis of the likelihood information,
wherein the likelihood information is obtained by using a table selected from a plurality of tables in which pieces of the likelihood information, which are different from each other, are determined with respect to the first data, the second data, and at least one of the third data and the fourth data.
12. The method according to claim 11 ,
wherein the likelihood information is obtained by using a first table among the plurality of tables, data that is read from the second memory cell is decoded by using the likelihood information that is obtained, and the likelihood information is further obtained by using a second table different from the first table among the plurality of tables when decoding fails.
13. The method according to claim 11 ,
wherein a plurality of pieces of the second data is read from the second memory cell by using a plurality of the second read voltages including one or more read voltage in which a difference from the first read voltage is a first differential value, and one or more read voltage in which a difference from the first read voltage is a second differential value.
14. The method according to claim 11 ,
wherein a plurality of the third data are read from the first memory cell by using a plurality of the first read voltages, and
a plurality of the fourth data are read from the third memory cell by using a plurality of the third read voltages.
15. The method according to claim 11 , wherein
the third data is information indicating whether or not a threshold voltage of the first memory cell is greater than the first read voltage, and
the fourth data is information indicating whether or not a threshold voltage of the third memory cell is greater than the third read voltage.
16. A method of controlling a nonvolatile memory, the nonvolatile memory including:
a memory string that includes a plurality of memory cells including a first memory cell, a second memory cell, and a third memory cell that are connected in series, and a selection transistor that is electrically connected to the plurality of memory cells in series;
a bit line that is connected to the memory string;
a first word line that is electrically connected to a gate of the first memory cell of the memory string;
a second word line that is electrically connected to a gate of the second memory cell of the memory string; and
a third word line that is electrically connected to a gate of the third memory cell of the memory string,
the method comprising:
reading data of the first memory cell by causing the nonvolatile memory to apply a first read voltage to the first word line;
reading data of the second memory cell by causing the nonvolatile memory to apply a second read voltage to the second word line;
reading data of the third memory cell by causing the nonvolatile memory to apply a third read voltage to the third word line;
reading data of the second memory cell by causing the nonvolatile memory to apply a fourth read voltage that is varied from the second read voltage to the second word line, in parallel to processing of decoding first data that is read data by the second read voltage;
obtaining, by a plurality of decoding units, likelihood information by using any one among a plurality of tables in which pieces of the likelihood information, which are different from each other, are determined with respect to the first data, second data that is read data by the fourth read voltage, and at least one of third data that is read data by the first read voltage and fourth data that is read data by the third read voltage, and
decoding, by the plurality of decoding units, data that is read from the second memory cell by using the likelihood information that is obtained.
17. The method according to claim 16 ,
wherein the likelihood information is obtained by using a first table among the plurality of tables, data that is read from the second memory cell is decoded by using the likelihood information that is obtained, and the likelihood information is further obtained by using a second table different from the first table among the plurality of tables when decoding fails.
18. The method according to claim 16 ,
wherein a plurality of pieces of the second data is read from the second memory cell by using a plurality of the second read voltages including one or more read voltage in which a difference from the first read voltage is a first differential value, and one or more read voltage in which a difference from the first read voltage is a second differential value.
19. The method according to claim 16 ,
wherein a plurality of the third data are read from the first memory cell by using a plurality of the first read voltages, and
a plurality of the fourth data are read from the third memory cell by using a plurality of the third read voltages.
20. The method according to claim 16 , wherein
the third data is information indicating whether or not a threshold voltage of the first memory cell is greater than the first read voltage, and
the fourth data is information indicating whether or not a threshold voltage of the third memory cell is greater than the third read voltage.