IP Library Granted Patent US 10,840,446
Granted Patent B2
US 10,840,446 · App. 16/287,753 · Granted Nov 17, 2020

Memory device

Inventors: Takashi Tachikawa (Yokkaichi, JP); Masumi Saitoh (Yokkaichi, JP)
Assignee: Toshiba Memory Corporation
H01L45/147H01L27/249H01L27/2436H01L45/08H01L45/1233H01L45/146
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Quick Facts
Patent No.
US 10,840,446
App. No.
16/287,753
Granted
Nov 17, 2020
Kind
B2
Abstract

A memory device according to an embodiment includes a first conductive layer; a second conductive layer; a first metal oxide layer that is provided between the first conductive layer and the second conductive layer and includes at least one first metal element selected from the group consisting of aluminum (Al), gallium (Ga), zirconium (Zr), and hafnium (Hf); and a second metal oxide layer that is provided between the first metal oxide layer and the second conductive layer and includes at least one second metal element selected from the group consisting of zinc (Zn), titanium (Ti), tin (Sn), vanadium (V), niobium (Nb), tantalum (Ta), and tungsten (W). The first metal oxide layer includes a third metal element. The third metal element has a lower valence than a metal element having the highest atomic percent in the first metal oxide layer among the at least one first metal element.

Claims (62)

1. A memory device comprising:

a first conductive layer;

a second conductive layer;

a first metal oxide layer provided between the first conductive layer and the second conductive layer, the first metal oxide layer including at least one first metal element selected from the group consisting of aluminum (Al), gallium (Ga), zirconium (Zr), and hafnium (Hf); and

a second metal oxide layer provided between the first metal oxide layer and the second conductive layer, the second metal oxide layer including at least one second metal element selected from the group consisting of zinc (Zn), titanium (Ti), tin (Sn), vanadium (V), niobium (Nb), tantalum (Ta), and tungsten (W),

wherein the first metal oxide layer includes a third metal element, and

the third metal element has a lower valence than a metal element having the highest atomic percent in the first metal oxide layer among the at least one first metal element.

2. The memory device according to claim 1 ,

wherein an atomic percent of the third metal element in the first metal oxide layer is lower than the atomic percent of the metal element having the highest atomic percent in the first metal oxide layer among the at least one first metal element.

3. The memory device according to claim 1 ,

wherein the second metal oxide layer includes a fourth metal element, and

the fourth metal element has a higher valence than a metal element having the highest atomic percent in the second metal oxide layer among the at least one second metal element.

4. The memory device according to claim 1 ,

wherein the first metal oxide layer includes at least one element selected from the group consisting of nitrogen (N), phosphorus (P), and arsenic (As).

5. The memory device according to claim 1 ,

wherein the second metal oxide layer includes a halogen element.

6. A memory device comprising:

a first conductive layer;

a second conductive layer;

a first metal oxide layer provided between the first conductive layer and the second conductive layer, the first metal oxide layer including at least one first metal element selected from the group consisting of aluminum (Al), gallium (Ga), zirconium (Zr), and hafnium (Hf); and

a second metal oxide layer provided between the first metal oxide layer and the second conductive layer, the second metal oxide layer being in contact with the first metal oxide layer, the second metal oxide layer including at least one second metal element selected from the group consisting of zinc (Zn), titanium (Ti), tin (Sn), vanadium (V), niobium (Nb), tantalum (Ta), and tungsten (W),

wherein the second metal oxide layer includes a third metal element, and

the third metal element has a lower valence than a metal element having the highest atomic percent in the second metal oxide layer among the at least one second metal element.

7. The memory device according to claim 6 ,

wherein the atomic percent of the third metal element in the second metal oxide layer is lower than the atomic percent of the metal element having the highest atomic percent in the second metal oxide layer among the at least one second metal element.

8. The memory device according to claim 6 ,

wherein the first metal oxide layer includes a fourth metal element, and

the fourth metal element has a higher valence than a metal element having the highest atomic percent in the first metal oxide layer among the at least one first metal element.

9. The memory device according to claim 6 ,

wherein the first metal oxide layer includes a halogen element.

10. The memory device according to claim 6 ,

wherein the second metal oxide layer includes at least one element selected from the group consisting of nitrogen (N), phosphorus (P), and arsenic (As).

11. The memory device according to claim 8 ,

wherein the fourth metal element is at least one metal element selected from the group consisting of aluminum (Al), gallium (Ga), zirconium (Zr), hafnium (Hf), zinc (Zn), titanium (Ti), tin (Sn), vanadium (V), niobium (Nb), tantalum (Ta), and tungsten (W).

12. A memory device comprising:

a first conductive layer;

a second conductive layer;

a first metal oxide layer provided between the first conductive layer and the second conductive layer, the first metal oxide layer including at least one first metal element selected from the group consisting of aluminum (Al), gallium (Ga), zirconium (Zr), and hafnium (Hf); and

a second metal oxide layer provided between the first metal oxide layer and the second conductive layer, the second metal oxide layer including at least one second metal element selected from the group consisting of zinc (Zn), titanium (Ti), tin (Sn), vanadium (V), niobium (Nb), tantalum (Ta), and tungsten (W),

wherein the first metal oxide layer includes a third metal element, and

the third metal element has a higher valence than a metal element having the highest atomic percent in the first metal oxide layer among the at least one first metal element.

13. The memory device according to claim 12 ,

wherein the atomic percent of the third metal element in the first metal oxide layer is lower than the atomic percent of the metal element having the highest atomic percent in the first metal oxide layer among the at least one first metal element.

14. The memory device according to claim 12 ,

wherein the first metal oxide layer includes a halogen element.

15. The memory device according to claim 12 ,

wherein the second metal oxide layer includes at least one element selected from the group consisting of nitrogen (N), phosphorus (P), and arsenic (As).

16. A memory device comprising:

a first conductive layer;

a second conductive layer;

a first metal oxide layer provided between the first conductive layer and the second conductive layer, the first metal oxide layer including at least one first metal element selected from the group consisting of aluminum (Al), gallium (Ga), zirconium (Zr), and hafnium (Hf); and

a second metal oxide layer provided between the first metal oxide layer and the second conductive layer, the second metal oxide layer including at least one second metal element selected from the group consisting of zinc (Zn), titanium (Ti), tin (Sn), vanadium (V), niobium (Nb), tantalum (Ta), and tungsten (W),

wherein the second metal oxide layer includes a third metal element, and

the third metal element has a higher valence than a metal element having the highest atomic percent in the second metal oxide layer among the at least one second metal element.

17. The memory device according to claim 16 ,

wherein the atomic percent of the third metal element in the second metal oxide layer is lower than the atomic percent of the metal element having the highest atomic percent in the second metal oxide layer among the at least one second metal element.

18. The memory device according to claim 16 ,

wherein the first metal oxide layer includes at least one element selected from the group consisting of nitrogen (N), phosphorus (P), and arsenic (As).

19. The memory device according to claim 16 ,

wherein the second metal oxide layer includes a halogen element.

20. The memory device according to claim 1 ,

wherein the third metal element is at least one element selected from the group consisting of aluminum (Al), gallium (Ga), zirconium (Zr), hafnium (Hf), zinc (Zn), titanium (Ti), tin (Sn), vanadium (V), niobium (Nb), tantalum (Ta), and tungsten (W).

Assignments (3)
CHANGE OF NAME AND ADDRESS Recorded Feb 4, 2022
From: K.K PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 058957/0124 →
CHANGE OF NAME AND ADDRESS Recorded Jan 31, 2022
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 058905/0582 →
MERGER Recorded Jan 31, 2022
From: TOSHIBA MEMORY CORPORATION
To: K.K PANGEA
Reel/Frame 058946/0675 →