IP Library Granted Patent US 11,288,199
Granted Patent B2
US 11,288,199 · App. 16/289,421 · Granted Mar 29, 2022

Separate read-only cache and write-read cache in a memory sub-system

Inventor: Dhawal Bavishi (San Jose, CA)
Assignee: Micron Technology, Inc.
G06F12/0893G06F12/0862G06F2212/1016G06F2212/602
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Quick Facts
Patent No.
US 11,288,199
App. No.
16/289,421
Granted
Mar 29, 2022
Kind
B2
Abstract

A determination can be made of a type of memory access workload for an application. A determination can be made whether the memory access workload for the application is associated with sequential read operations. The data associated with the application can be stored at one of a cache of a first type or another cache of a second type based on the determination of whether the memory workload for the application is associated with sequential read operations.

Claims (54)

1. A method comprising:

determining a memory access workload for an application;

determining whether the memory access workload for the application is associated with at least one of (a) sequential read operations comprising a plurality of read requests received in order and directed to at least one of a same memory address or sequential memory addresses, or (b) write and read operations;

responsive to the memory access workload, retrieving data associated with the application from a backing store; and

storing the data associated with the application and retrieved from the backing store in at least one of a cache of a first type or a cache of second type based on the determination of the memory access workload, wherein storing the data comprises at least one of:

storing, by a processing device, the data associated with the application and retrieved from the backing store at the cache of the first type based on the determination that the memory workload for the application is associated with sequential read operations; or

storing, by the processing device, the data associated with the application and retrieved from the backing store at the cache of the second type based on the determination that the memory workload for the application is associated with write and read operations.

2. The method of claim 1 , further comprising storing the data associated with the application at the cache of the first type in response to the memory access workload being associated with sequential read operations, wherein the first type is read- only.

3. The method of claim 1 , further comprising storing the data associated with the application at the cache of the second type in response to the memory access workload being associated with write and read operations, wherein the second type is write-read.

4. The method of claim 1 , wherein determining the memory access workload for the application comprises:

receiving a plurality of memory access requests from the application;

determining a pattern based on the plurality of memory access requests; and

determining the memory access workload for the application based on the pattern.

5. The method of claim 1 , further comprising:

receiving the data associated with the application in one or more write requests to write the data to a memory component, wherein the one or more write requests have a fixed data size.

6. The method of claim 5 , further comprising:

storing the data associated with the application at one or more sectors of a cache line of the cache of the second type to accumulate the data in the cache line in response to determining that memory access workload for the application is associated with write and read operations, wherein each of the one or more sectors have the fixed data size.

7. The method of claim 6 , further comprising

determining when a cumulative data size of the one or more sectors storing the data associated with the application satisfies a threshold condition; and

responsive to determining that the cumulative data size of the one or more sectors storing the data associated with the application satisfies the threshold condition, transmitting a request to store the data at the memory component.

8. The method of claim 1 , further comprising:

receiving a command to preload the cache of the first type or the cache of the second type with the data associated with the application; and

loading the cache of the first type or the cache of the second type with the data associated with the application prior to a request to access the data being received from the application.

9. A system comprising:

a memory device; and

a processing device, operatively coupled with the memory device, to:

determine a memory access workload for an application;

determine whether the memory access workload for the application is associated with at least one of (a) sequential read operations comprising a plurality of read requests received in order and directed to at least one of a same memory address or sequential memory addresses, or (b) write and read operations;

responsive to the memory access workload, retrieve data associated with the application from a backing store of the memory device; and

storing the data associated with the application and retrieved from the backing store in at least one of a cache of a first type or a cache of second type based on the determination of the memory access workload, wherein storing the data comprises at least one of:

store the data associated with the application and retrieved from the backing store at the cache of the first type based on the determination that the memory workload for the application is associated with sequential read operations; or

store the data associated with the application and retrieved from the backing store at the cache of the second type based on the determination that the memory workload for the application is associated with write and read operations.

10. The system of claim 9 , wherein the processing device is further to store the data associated with the application at the cache of the first type in response to the memory access workload being associated with sequential read operations, wherein the first type is read-only.

11. The system of claim 9 , wherein the processing device is further to store the data associated with the application at the cache of the second type in response to the memory access workload being associated with write and read operations, wherein the second type is write-read.

12. The system of claim 9 , wherein to determine the memory access workload for the application, the processing device is further to:

receive a plurality of memory access requests from the application;

determine a pattern based on the plurality of memory access requests; and

determine the memory access workload for the application based on the pattern.

13. The system of claim 9 , wherein the processing device is further to:

receive the data associated with the application in one or more write requests to write the data to a memory component, wherein the one or more write requests have a fixed data size.

14. The system of claim 13 , wherein the processing device is further to:

store the data associated with the application at one or more sectors of a cache line of the cache of the second type to accumulate the data in the cache line based on a determination of whether the memory workload for the application is associated with write and read operations, wherein each of the one or more sectors have the fixed data size;

determine when a cumulative data size of the one or more sectors storing the data associated with the application satisfies a threshold condition; and

responsive to determining that the cumulative data size of the one or more sectors storing the data associated with the application satisfies the threshold condition, transmit a request to store the data at the memory component.

15. A non-transitory machine-readable medium storing instructions that, when executed by a processing device, cause the processing device to:

receive a plurality of requests to access data at a memory component, wherein each of the plurality of requests specifies a fixed size of data;

store data of each of the plurality of requests into a respective sector of a plurality of sectors of a cache line of a cache to accumulate the data in the cache line, wherein each respective sector of the plurality of sectors of the cache line stores the data at the fixed size;

determine whether a cumulative data size of the plurality of sectors storing the data of the plurality of requests satisfies a threshold condition pertaining to the cumulative data size, wherein the threshold condition is based at least in part on a size of a segment of the memory component; and

responsive to determining that the cumulative data size of the plurality of sectors of the cache line storing the data satisfies the threshold condition, transmit a request to store the data at the memory component.

16. The non-transitory machine-readable medium of claim 15 , wherein the fixed size of data is specified by a protocol used by a host system to interface with a memory sub-system comprising the memory component.

17. The non-transitory machine-readable medium of claim 15 , wherein the threshold condition corresponds to the cumulative data size satisfying a data size parameter specified for accessing the memory component.

18. The non-transitory machine-readable media of claim 15 , wherein the processing device is further to:

receive a command to preload the cache with other data associated with an application; and

write the other data associated with the application to the cache prior to receiving the plurality of requests to access the data at the memory component.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 15, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051041/0317 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050724/0392 →
SUPPLEMENT NO. 12 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048948/0677 →
SUPPLEMENT NO. 3 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 048951/0902 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2019
From: BAVISHI, DHAWAL
To: MICRON TECHNOLOGY, INC.
Reel/Frame 048472/0778 →