Antenna module

1. An antenna module comprising:

an antenna substrate including an antenna pattern;

a semiconductor package disposed on a lower surface of the antenna substrate, electrically connected to the antenna substrate, and having at least one semiconductor chip embedded therein; and

an electronic component disposed on the lower surface, electrically connected to the antenna substrate, and spaced apart from the semiconductor package by a predetermined distance,

wherein the electronic component comprises a passive component and has a thickness greater than a thickness of the at least one semiconductor chip, and

wherein the antenna substrate has a recess portion formed in a lower side thereof,

the electronic component is disposed in the recess portion of the antenna substrate, and

the electronic component is connected to an inner wiring layer of the antenna substrate.

2. The antenna module of claim 1 , wherein the thickness of the electronic component is greater than a thickness of the semiconductor package.

3. The antenna module of claim 1 , wherein the semiconductor package includes a radio frequency integrated circuit (RFIC) and a power management integrated circuit (PMIC) as the at least one semiconductor chip, and

at least one passive component is further embedded in the semiconductor package.

4. The antenna module of claim 1 , wherein the electronic component is a power inductor (PI).

5. The antenna module of claim 1 , wherein the recess portion exposes the inner wiring layer of the antenna substrate, and

the antenna substrate includes an outer wiring layer disposed between the inner wiring layer and the semiconductor package.

6. The antenna module of claim 1 , wherein the electronic component is disposed in a state in which the electronic component is covered with an encapsulant, and

a metal layer is disposed on an outer surface of the encapsulant covering the electronic component.

7. An antenna module comprising:

an antenna substrate including an antenna pattern;

a semiconductor package disposed on a lower surface of the antenna substrate, electrically connected to the antenna substrate, and having at least one semiconductor chip embedded therein; and

an electronic component disposed on the lower surface or at a side of the antenna substrate, electrically connected to the antenna substrate, and spaced apart from the semiconductor package by a predetermined distance,

wherein the electronic component has a thickness greater than a thickness of the at least one semiconductor chip, and

wherein the semiconductor package includes a frame having a first through-hole, a first semiconductor chip disposed in the first through-hole and having a first active surface having first connection pads disposed thereon and a first inactive surface opposing the first active surface, an encapsulant covering at least portions of each of the frame and the first inactive surface of the first semiconductor chip and filling at least portions of the first through-hole, and a connection structure disposed on the frame and the first active surface of the first semiconductor chip and including redistribution layers electrically connected to the first connection pads.

8. The antenna module of claim 7 , wherein the frame further has a second through-hole spaced apart from the first through-hole and a third through-hole spaced apart from the first and second through-holes,

a second semiconductor chip is disposed in the second through-hole, the second semiconductor chip having a second active surface having second connection pads disposed thereon and a second inactive surface opposing the second active surface, and

a passive component is disposed in the third through-hole.

9. The antenna module of claim 8 , wherein the frame includes a metal layer disposed on walls of the first to third through-holes and extending to a lower surface of the frame, and

the semiconductor package further includes a backside metal layer disposed on a lower surface of the encapsulant and backside metal vias penetrating through the encapsulant and connecting the backside metal layer to the metal layer of the frame.

10. The antenna module of claim 7 , wherein the frame includes an insulating layer, a first wiring layer disposed on an upper surface of the insulating layer, a second wiring layer disposed on a lower surface of the insulating layer, and connection vias penetrating through the insulating layer and electrically connecting the first and second wiring layers to each other.

11. The antenna module of claim 10 , wherein the semiconductor package further includes a backside wiring layer disposed on a lower surface of the encapsulant and backside connection vias penetrating through the encapsulant and connecting the backside wiring layer to the second wiring layer of the frame.

12. The antenna module of claim 7 , wherein the frame includes a first insulating layer, a first wiring layer disposed on an upper surface of the first insulating layer, a second wiring layer disposed on a lower surface of the first insulating layer, a second insulating layer disposed on the upper surface of the first insulating layer and covering the first wiring layer, a third wiring layer disposed on an upper surface of the second insulating layer, a third insulating layer disposed on the lower surface of the first insulating layer and covering the second wiring layer, a fourth wiring layer disposed on a lower surface of the third insulating layer, first connection vias penetrating through the first insulating layer and electrically connecting the first and second wiring layers to each other, second connection vias penetrating through the second insulating layer and electrically connecting the first and third wiring layers to each other, and third connection vias penetrating through the third insulating layer and electrically connecting the second and fourth wiring layers to each other.

13. The antenna module of claim 7 , wherein the frame includes a first insulating layer, a first wiring layer embedded in an upper side of the first insulating layer so that an upper surface of the first wiring layer is exposed, a second wiring layer disposed on a lower surface of the first insulating layer, a second insulating layer disposed on the lower surface of the first insulating layer and covering the second wiring layer, a third wiring layer disposed on a lower surface of the second insulating layer, first connection vias penetrating through the first insulating layer and electrically connecting the first and second wiring layers to each other, and second connection vias penetrating through the second insulating layer and electrically connecting the second and third wiring layers to each other.