UFS based idle time garbage collection management
Disclosed in some examples are systems, methods, NAND memory devices, and machine readable mediums for intelligent SLC cache migration processes that move data written to SLC cache to MLC storage based upon a set of rules that are evaluated using the state of the NAND device. In some examples, the SLC cache migration process may utilize a number of NAND operational parameters to determine when to move the data written to SLC cache to MLC, how much data to move from SLC to MLC, and the parameters for moving the data.
1. A method of operating a NAND device, the method comprising:
at a NAND controller:
retrieving an SLC cache initiation rule specifying a NAND operational condition for migration of data stored in an SLC cache to MLC memory cells and a source selection rule specifying an order for migrating data stored in the SLC cache;
retrieving a first NAND operational condition specified by the initiation rule, and determining whether the first NAND operational condition satisfies the initiation rule; and
responsive to the initiation rule being satisfied, migrating at least a portion of data stored in the SLC cache to MLC memory cells of the NAND device by moving the data stored in the SLC cache in an order specified by the source selection rule, wherein the source selection rule comprises a fragmentation rule and wherein migrating the at least a portion of data stored in the SLC cache to MLC memory cells of the NAND device comprises moving blocks of data in the SLC cache to MLC memory cells in an order based upon the degree of fragmentation of each of the blocks of data in the SLC cache.
2. The method of claim 1 , further comprising retrieving a termination condition, and wherein migrating the at least a portion of data stored in the SLC cache to MLC memory cells of the NAND device comprises:
determining that the termination condition is satisfied, the termination condition corresponding to a NAND operational condition; and
responsive to the termination condition being satisfied, terminating the migration, wherein the termination condition is not a completion of the migration.
3. The method of claim 1 , wherein the MLC memory cells are triple level cells.
4. The method of claim 1 , comprising:
receiving the initiation rule and the source selection rule from a host device across a host interface.
5. The method of claim 1 , comprising:
determining a rate for the migration operations, and wherein migrating the at least the portion of data stored in the SLC cache to MLC memory cells of the NAND comprises migrating the at least the portion of data stored in the SLC cache to MLC memory cells of the NAND at the rate.
6. The method of claim 1 , comprising:
garbage collecting SLC memory cells where data was stored that was migrated to MLC memory cells.
7. The method of claim 1 , wherein moving blocks of data in the SLC cache to MLC memory cells in an order based upon the degree of fragmentation of the block of data in the SLC cache comprises moving blocks of data in the SLC cache in an order such that less fragmented blocks are moved before blocks that are more fragmented.
8. A NAND device comprising:
a controller configured to perform operations comprising:
retrieving an SLC cache initiation rule specifying a NAND operational condition for migration of data stored in an SLC cache to MLC memory cells and a source selection rule specifying an order for migrating data stored in the SLC cache;
retrieving a first NAND operational condition specified by the initiation rule, and determining whether the first NAND operational condition satisfies the initiation rule; and
responsive to the initiation rule being satisfied, migrating at least a portion of data stored in the SLC cache to MLC memory cells of the NAND device by moving the data stored in the SLC cache in an order specified by the source selection rule, wherein the source selection rule comprises a fragmentation rule and wherein migrating the at least a portion of data stored in the SLC cache to MLC memory cells of the NAND device comprises moving blocks of data in the SLC cache to MLC memory cells in an order based upon the degree of fragmentation of each of the blocks of data in the SLC cache.
9. The NAND device of claim 8 , wherein the operations further comprise retrieving a termination condition, and wherein migrating the at least a portion of data stored in the SLC cache to MLC memory cells of the NAND device comprises:
determining that the termination condition is satisfied, the termination condition corresponding to a NAND operational condition; and
responsive to the termination condition being satisfied, terminating the migration, wherein the termination condition is not a completion of the migration.
10. The NAND device of claim 8 , wherein the MLC memory cells triple level cells.
11. The NAND device of claim 8 , wherein the operations further comprise:
receiving the initiation rule and the source selection rule from a host device across a host interface.
12. The NAND device of claim 8 , wherein the operations further comprise:
determining a rate for the migration operations, and wherein migrating the at least the portion of data stored in the SLC cache to MLC memory cells of the NAND comprises migrating the at least the portion of data stored in the SLC cache to MLC memory cells of the NAND at the rate.
13. The NAND device of claim 8 , wherein the operations further comprise:
garbage collecting SLC memory cells where data was stored that was migrated to MLC memory cells.
14. The NAND device of claim 8 , wherein moving blocks of data in the SLC cache to MLC memory cells in an order based upon the degree of fragmentation of the block of data in the SLC cache comprises moving blocks of data in the SLC ache in an order such that less fragmented blocks are moved before blocks that are more fragmented.
15. A non-transitory machine-readable medium, storing instructions, which when executed by a machine, causes the machine to perform operations comprising:
retrieving an SLC cache initiation rule specifying a NAND operational condition for migration of data stored in an SLC cache to MLC memory cells and a source selection rule specifying an order for migrating data stored in the SLC cache;
retrieving a first NAND operational condition specified by the initiation rule, and determining whether the first NAND operational condition satisfies the initiation rule; and
responsive to the initiation rule being satisfied, migrating at least a portion of data stored in the SLC cache to MLC memory cells of the NAND device by moving the data stored in the SLC cache in an order specified by the source selection rule, wherein the source selection rule comprises a fragmentation rule and wherein migrating the at least a portion of data stored in the SLC cache to MLC memory cells of the NAND device comprises moving blocks of data in the SLC cache to MLC memory cells in an order based upon the degree of fragmentation of each of the blocks of data in the SLC cache.
16. The non-transitory machine-readable medium of claim 15 , wherein the operations further comprise retrieving a termination condition, and wherein migrating the at least a portion of data stored in the SLC cache to MLC memory cells of the NAND device comprises:
determining that the termination condition is satisfied, the termination condition corresponding to a NAND operational condition; and
responsive to the termination condition being satisfied, terminating the migration, wherein the termination condition is not a completion of the migration.
17. The non-transitory machine-readable medium of claim 15 , wherein the MLC memory cells are triple level cells.
18. The non-transitory machine-readable medium of claim 15 , wherein the operations further comprise:
receiving the initiation rule and the source selection rule from a host device across a host interface.
19. The non-transitory machine-readable medium of claim 15 , wherein the operations further comprise:
determining a rate for the migration operations, and wherein migrating the at least the portion of data stored in the SLC cache to MLC memory cells of the NAND comprises migrating the at least the portion of data stored in the SLC cache to MLC memory cells of the NAND at the rate.