Methods of forming assemblies including semiconductor material with heavily-doped and lightly-doped regions

1. A method of forming an assembly, comprising:

forming a heavily-doped region along a surface of a first semiconductor material;

forming a protective material over the heavily-doped region;

forming a stack over the protective material;

etching through the stack to the protective material to form an opening through the stack and expose a region of the protective material;

removing the exposed region of the protective material to expose the heavily-doped region;

after removing the protective material, forming lightly-doped second semiconductor material within the opening; the heavily-doped region not being exposed to oxidant from the time of removing the protective material to the time of forming the lightly-doped second semiconductor material; and

out-diffusing dopant from the heavily-doped region and into the second semiconductor material; the out-diffusing forming a heavily-doped lower region within the second semiconductor material adjacent the heavily-doped region while leaving a lightly-doped upper region of the second semiconductor material above the heavily-doped lower region; the lightly-doped upper region and heavily-doped lower region being majority doped to a same dopant type, and joining to one another along a boundary region.

2. The method of claim 1 wherein the protective material comprises semiconductor material.

3. The method of claim 2 further comprising oxidizing at least some of the protective material prior to removing the protective material.

4. The method of claim 1 wherein the protective material comprises germanium.

5. The method of claim 1 wherein the protective material comprises silicon.

6. The method of claim 1 wherein plasma doping (PLAD) is utilized for the forming of the heavily-doped region.

7. The method of claim 6 wherein plasma doping (PLAD) is utilized for the forming of the protective material.

8. A method of forming an assembly, comprising:

forming a first semiconductor structure comprising heavily-doped silicon;

forming a germanium-containing interface material over the first semiconductor structure, the germanium-containing interface material consisting of a material selected from non-oxidized germanium and partially oxidized germanium;

forming a protective material comprising one or both of Si and Ge over the germanium-containing interface material;

forming an opening extending entirely through the protective material; and

forming a second semiconductor structure extending within the opening and contacting the germanium-containing interface material; the second semiconductor structure having a heavily-doped lower region adjacent the germanium-containing interface material and having a lightly-doped upper region above the heavily-doped lower region; the lightly-doped upper region and heavily-doped lower region being majority doped to a same dopant type, and joining to one another along a boundary region.

9. The method of claim 8 wherein said same dopant type is n-type.

10. The method of claim 8 wherein said same dopant type is p-type.

11. The method of claim 8 wherein the germanium-containing interface material comprises germanium oxide.

12. The method of claim 8 wherein the germanium-containing interface material comprises non-oxidized germanium.

13. The method of claim 8 further comprising forming a gating structure adjacent the boundary region.

14. The method of claim 13 wherein the gating structure is comprised by a select device, with the select device being a source side select gate (SGS) device; and further comprising forming a plurality of memory cells connected in series with the select device.

15. The method of claim 14 wherein the memory cells are vertically stacked over the select device.