IP Library › Granted Patent US 10,886,415
Granted Patent B2
US 10,886,415 · App. 16/295,750 · Granted Jan 5, 2021

Multi-state transistor devices with multiple threshold voltage channels

Inventors: Ko-Tao Lee (Yorktown Heights, NY); Pierce I-Jen Chuang (Briarcliff Manor, NY); Cheng-Wei Cheng (White Plains, NY); Seyoung Kim (White Plains, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
H01L29/78696H01L29/42392H01L29/6653H01L29/6681H01L29/66553H01L29/66742H01L29/7853H01L29/78642H01L29/0673H01L29/1033
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Quick Facts
Patent No.
US 10,886,415
App. No.
16/295,750
Granted
Jan 5, 2021
Kind
B2
Abstract

A method of forming a multi-state nanosheet transistor device is provided. The method includes forming an alternating sequence of sacrificial layer segments and differentially doped nanosheet layer segments on a substrate, wherein each of the differentially doped nanosheet layer segments has a different dopant concentration from the other differentially doped nanosheet layer segments. The method further includes forming a source/drain on each of opposite ends of the sacrificial layer segments and differentially doped nanosheet layer segments, and removing the sacrificial layer segments. The method further includes depositing a gate dielectric layer on the differentially doped nanosheet layer segments, and forming a gate electrode on the gate dielectric layer to form a common gate-all-around structure, where each of the differentially doped nanosheet layer segments conducts current at a different threshold voltage.

Claims (12)

1. A method of forming a multi-state nanosheet transistor device, comprising:

forming an alternating sequence of sacrificial layer segments and differentially doped nanosheet layer segments on a substrate, wherein each of the differentially doped nanosheet layer segments has a different dopant concentration from the other differentially doped nanosheet layer segments;

forming a source/drain on each of opposite ends of the sacrificial layer segments and differentially doped nanosheet layer segments;

removing the sacrificial layer segments;

depositing a gate dielectric layer on the differentially doped nanosheet layer segments; and

forming a gate electrode on the gate dielectric layer to form a common gate-all-around structure, where each of the differentially doped nanosheet layer segments conducts current at a different threshold voltage.

2. The method of claim 1 , wherein the differentially doped nanosheet layer segments each have a dopant concentration in a range of about 1×10 11 cm −3 to about 1×10 19 cm −3 .

3. The method of claim 1 , wherein the alternating sequence of sacrificial layer segments and differentially doped nanosheet layer segments includes at least four differentially doped nanosheet layer segments, which includes a second differentially doped nanosheet layer segment that has about double the dopant concentration of a first differentially doped nanosheet layer segment of the at least four differentially doped nanosheet layer segments.

4. The method of claim 3 , wherein the first differentially doped nanosheet layer segment has a dopant concentration of about 1×10 12 cm′ to about 1×10 18 cm −3 , and the second differentially doped nanosheet layer segment has a dopant concentration of about 2×10 12 cm 3 to about 2×10 18 cm −3 .

5. The method of claim 4 , wherein a third differentially doped nanosheet layer segment of the at least four differentially doped nanosheet layer segments has a dopant concentration of about 4×10 12 cm −3 to about 4×10 18 cm −3 .

6. The method of claim 5 , wherein a fourth differentially doped nanosheet layer segment of the at least four differentially doped nanosheet layer segments has a dopant concentration of about 8×10 12 cm −3 to about 8×10 18 cm −3 .

7. The method of claim 6 , wherein the dopant concentrations of the at least four differentially doped nanosheet layer segments provide an integer multiple of about a 150 mV difference in the threshold voltages between each vertically adjacent pair of the at least four differentially doped nanosheet layer segments.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 7, 2019
From: LEE, KO-TAO; CHUANG, PIERCE I-JEN; CHENG, CHENG-WEI; KIM, SEYOUNG
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 048533/0651 →
Continuity (1)
Related Publication 20200287055A1 · Sep 10, 2020
Cited By (1)
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