Display device
A display device includes a substrate having a display area and a non-display area located at an outer periphery of the display area; a transistor layer disposed on the substrate; a plurality of partition walls disposed on the transistor layer in the display area; a light emitting element disposed between the partition walls; and a spacer configured to be disposed in the non-display area of the substrate, wherein the spacer may include a spacer body disposed on the same layer as the partition walls and on at least a portion of the transistor layer.
1. A display device comprising:
a substrate having a display area and a non-display area located at an outer periphery of the display area;
a transistor disposed on the substrate;
a plurality of partition walls disposed on the transistor in the display area;
a light emitting element disposed between the partition walls; and
a spacer disposed in the non-display area of the substrate, the spacer including a spacer body and at least a portion of the transistor.
2. The display device of claim 1 , wherein
the transistor comprises a source electrode and a drain electrode, and
the spacer comprises a dummy electrode disposed in the same layer as the source electrode and the drain electrode.
3. The display device of claim 2 , wherein
the transistor further comprises a gate insulating layer, a first interlayer insulating layer, and a second interlayer insulating layer, and
the spacer further comprises the gate insulating layer, the first interlayer insulating layer, and the second interlayer insulating layer.
4. The display device of claim 3 , wherein
the transistor further comprises a coating layer coating the source electrode and the drain electrode, and
the spacer further comprises the coating layer disposed on the dummy electrode.
5. The display device of claim 1 , wherein
the transistor comprises two or more data conductors disposed on different layers, and
the spacer comprises two or more data conductors disposed on different layers.
6. The display device of claim 1 , wherein
a plurality of partition wall spacers are disposed on some of the plurality of partition walls.
7. The display device of claim 6 , wherein
each of the plurality of partition walls and the plurality of partition wall spacers are formed from same material and are connected to each other.
8. The display device of claim 6 , wherein
a ratio of the partition walls at which the partition wall spacers are disposed among all of the partition walls is about 10% to about 20%.
9. The display device of claim 6 , wherein
the ratio of the height of the spacer to a sum of the heights of the partition wall and the partition wall spacer is about 0.7 to about 1.
10. The display device of claim 1 , wherein
the height of the spacer is about 3 μm to about 6 μm.
11. The display device of claim 1 , wherein
the spacer is disposed about 150 μm to about 200 μm apart from an edge of the display area.
12. The display device of claim 1 , wherein
the spacer body comprises the same material as the partition wall.
13. The display device of claim 1 , further comprising
a dam disposed in the non-display area, and
the spacer disposed between the dam and the display area.
14. A display device comprising:
a substrate having a display area and a non-display area located at an outer periphery of the display area;
a transistor disposed on the substrate;
a plurality of partition walls disposed on the transistor in the display area;
a plurality of partition wall spacers disposed on some of the plurality of partition walls;
a light emitting element disposed between the partition walls; and
a plurality of spacers disposed in the non-display area of the substrate,
wherein the spacers disposed in the non-display area are arranged at a density higher than a density at which the partition wall spacers disposed in the display area are arranged.
15. The display device of claim 14 , wherein
a ratio of the partition walls at which the partition wall spacers are disposed among all the partition walls disposed in the display area is about 10% to about 20%.
16. The display device of claim 14 , wherein
the arrangement density of the spacers disposed in the non-display area is about 1.5 to about 3 times the arrangement density of the partition wall spacers disposed in the display area.
17. The display device of claim 14 , wherein
the partition wall and the partition wall spacer comprise the same material and are connected to each other.
18. The display device of claim 14 , wherein
the spacer comprises a spacer body disposed in the same layer as the partition wall, and at least a portion of the transistor.
19. The display device of claim 18 , wherein
the transistor comprises a source electrode and a drain electrode, and
the spacer comprises a dummy electrode disposed in the same layer as the source electrode and the drain electrode.
20. The display device of claim 19 , wherein
the transistor further comprises a gate insulating layer, a first interlayer insulating layer, and a second interlayer insulating layer, and
the spacer further comprises the gate insulating layer, the first interlayer insulating layer, and the second interlayer insulating layer.
21. The display device of claim 14 , wherein
the ratio of the height of the spacer to a sum of the heights of the partition wall and the partition wall spacer is about 0.5 to about 1.
22. A display device comprising:
a substrate having a display area and a non-display area located at an outer periphery of the display area;
a transistor disposed on the substrate;
a plurality of partition walls disposed on the transistor in the display area;
a plurality of partition wall spacers disposed on some of the plurality of partition walls;
a light emitting element disposed between the partition walls; and
a plurality of spacers disposed in the non-display area of the substrate,
wherein the spacer includes a spacer body disposed in the same layer as the partition wall, and on at least a portion of the transistor, and
the spacers are disposed in the non-display area at a higher density than a density at which the partition wall spacers are disposed in the display area.
23. The display device of claim 22 , wherein
the arrangement density of the spacers disposed in the non-display area is about 1.5 to about 3 times the arrangement density of the partition wall spacers disposed in the display area.
24. The display device of claim 22 , wherein
the transistor comprises a source electrode and a drain electrode, and
the spacer comprises a dummy electrode disposed in the same layer as the source electrode and the drain electrode.
25. The display device of claim 22 , wherein
a ratio of a height of the spacer to a sum of heights of the partition wall and the partition wall spacer is about 0.7 to about 1.