IP Library Granted Patent US 10,943,815
Granted Patent B2
US 10,943,815 · App. 16/308,602 · Granted Mar 9, 2021

Structure for radiofrequency applications

Inventors: Eric Desbonnets (Lumbin, FR); Ionut Radu (Crolles, FR); Oleg Kononchuk (Theys, FR); Jean-Pierre Raskin (Belgique, FR)
Assignee: Soitec
H01L21/76283H01L21/02002H01L21/76224H01L21/84H01L27/1203H01L27/1218H01L29/0649H01L29/78603H01L21/76264
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Quick Facts
Patent No.
US 10,943,815
App. No.
16/308,602
Granted
Mar 9, 2021
Kind
B2
Abstract

A substrate for microelectronic radiofrequency devices includes a carrier substrate made of a first semiconductor material having a resistivity higher than 500 ohms-cm; a plurality of trenches in the carrier substrate, which trenches are filled with a second material, and defining on a first side of the carrier substrate a plurality of first zones made of a first material and at least one second zone made of a second material. The second material has a resistivity higher than 10 kohms-cm, and the first zones have a maximum dimension smaller than 10 microns and are insulated from one another by the second zone.

Claims (31)

1. A substrate for microelectronic radiofrequency devices comprising:

a support substrate comprising a first semiconductor material having a resistivity greater than 500 ohms-cm; and

a plurality of trenches in the support substrate partially filled with a second material and partially filled with a third material, the third material having a composition different than the second material, the plurality of trenches defining a plurality of first zones on a first side of the first semiconductor material and at least one second zone of a second material, the second material having a resistivity greater than 10 kohms-cm, the plurality of first zones having a maximum lateral dimension of less than 10 microns, the plurality of first zones being isolated from one another by the at least one second zone.

2. The substrate of claim 1 , wherein a surface density of the plurality of first zones and the at least one second zone confers on an upper part of the substrate extending from the first side of the support substrate to a depth of the plurality of trenches, an average thermal conductivity greater than 20 W/m·K, an average dielectric permittivity lower than the permittivity of the first semiconductor material, and a resistivity higher than the resistivity of the first semiconductor material.

3. The substrate of claim 1 , wherein the at least one second zone forms a mesh on the first side of the support substrate.

4. The substrate of claim 1 , wherein the depth of the plurality of trenches is between 1 micron and 100 microns.

5. The substrate of claim 1 , wherein the first semiconductor material comprises silicon.

6. The substrate of claim 1 , wherein the second material partially filling the plurality of trenches is selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, aluminum nitride, amorphous or polycrystalline silicon, carbon-rich silicon, a polymer, or a gas.

7. The substrate of claim 1 , wherein the third material is located on internal walls defining the plurality of trenches and the second material is located on a side of the third material opposite the first semiconductor material of the support substrate.

8. The substrate of claim 1 , wherein the third material is selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, aluminum nitride, amorphous or polycrystalline silicon, carbon-rich silicon, a polymer, or a gas.

9. The substrate of claim 1 , further comprising a dielectric layer on the first side of the support substrate.

10. The substrate of claim 9 , further comprising an additional layer between the dielectric layer and the first side of the support substrate comprised of the third material.

11. The substrate of claim 9 , wherein the dielectric layer comprises a material selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, or aluminum nitride.

12. The substrate of claim 9 , wherein the dielectric layer is comprised of the second material.

13. The substrate of claim 1 , further comprising a useful layer on the first side of the support substrate.

14. The substrate of claim 13 , further comprising a dielectric layer on the first side of the support substrate, wherein the dielectric layer is sandwiched between the useful layer and the first side of the support substrate.

15. The substrate of claim 13 , wherein the useful layer comprises a material selected from a group consisting of a semiconductor material, an insulating material, a conductive material, or a piezoelectric material.

16. A microelectronic device structure, comprising:

a substrate as recited in claim 1 ; and

a layer of microelectronic devices on the substrate.

17. The microelectronic device structure of claim 16 , wherein at least one of the microelectronic devices comprises an antenna switch, an adaptor, a power amplifier, a low noise amplifier, a passive component, a high frequency circuit, a radio frequency MEMS component, or a radiofrequency filter.

18. A method for manufacturing a substrate for microelectronic radiofrequency devices, comprising:

providing a support substrate comprising a first semiconductor material having a resistivity greater than 500 ohms-cm, the support substrate having a first side;

etching, according to a mask, a plurality of trenches extending from the first side of the support substrate to a determined depth within the support substrate;

partially filling the plurality of trenches with a third material; and

filling remainders of the plurality of trenches with a second material to form first zones of a first material and at least one second zone on the first side of the second material, the first zones having a maximum lateral dimension of 10 microns or less, the first zones being insulated from one another by the second zone, the second material having a resistivity greater than 10 kohms-cm, the second material having a composition different than the third material.

19. A method for manufacturing a substrate for microelectronic radiofrequency devices, comprising:

providing a support substrate comprising a first semiconductor material having a resistivity greater than 500 ohms-cm;

depositing, according to a mask, a plurality of pillars made from the first material and of a determined height, on the support substrate, an upper surface of the pillars defining a first side of the substrate, the pillars being insulated from each other by a plurality of trenches extending from the first side of the support substrate to a depth within the support substrate defined by the determined height of the pillars;

partially filling the plurality of trenches with a third material; and

filling remainders of the plurality of trenches with a second material to form first zones of the first material and at least one second zone on the first side of the second material, the first zones having a maximum lateral dimension of 10 microns or less, the first zones being insulated from one another by the at least one second zone, the second material having a resistivity greater than 10 kohms-cm, the second material having a composition different than the third material.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 14, 2019
From: DESBONNETS, ERIC; RADU, IONUT; KONONCHUK, OLEG; RASKIN, JEAN-PIERRE
To: SOITEC
Reel/Frame 048330/0920 →
Priority Claims (1)
FR 1655266 · Jun 8, 2016 · national
Continuity (1)
Related Publication 20190157137A1 · May 23, 2019