IP Library › Granted Patent US 11,563,059
Granted Patent B2
US 11,563,059 · App. 16/330,561 · Granted Jan 24, 2023

Display substrate having auxiliary electrode layer electrically connected to first electrode display apparatus, and method of fabricating display substrate

Inventors: Tingting Zhou (Beijing, CN); Chengchung Yang (Beijing, CN); Bin Zhang (Beijing, CN)
Assignee: BOE Technology Group Co., Ltd.
H01L27/3218H01L27/3246H01L27/3276H01L51/5212H01L51/56H01L2227/323
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Quick Facts
Patent No.
US 11,563,059
App. No.
16/330,561
Granted
Jan 24, 2023
Kind
B2
Abstract

The present application provides a display substrate having a plurality of subpixel areas. The display substrate includes a base substrate; a first electrode layer on the base substrate and including a plurality of first electrodes respectively in the plurality of subpixel areas; an auxiliary electrode layer; and an insulating layer between the first electrode layer and the auxiliary electrode layer. The first electrode layer and the auxiliary electrode layer are spaced apart and insulated from each other by the insulating layer. An orthographic projection of each individual one of the plurality of first electrodes on the base substrate at least partially overlap with an orthographic projection of the auxiliary electrode layer on the base substrate. Each of the plurality of first electrodes is electrically connected to a pixel circuit configured to drive light emission in a respective one of the plurality of subpixel areas.

Claims (64)

1. A display substrate having a plurality of subpixel areas, comprising:

a base substrate;

a first electrode layer on the base substrate and comprising a plurality of first electrodes respectively in the plurality of subpixel areas;

an auxiliary electrode layer;

an insulating layer between the first electrode layer and the auxiliary electrode layer;

an auxiliary voltage terminal; and

an auxiliary electrode signal line;

wherein the first electrode layer and the auxiliary electrode layer are spaced apart and insulated from each other by the insulating layer;

an orthographic projection of each individual one of the plurality of first electrodes on the base substrate at least partially overlap with an orthographic projection of the auxiliary electrode layer on the base substrate;

each of the plurality of first electrodes is electrically connected to a pixel circuit configured to drive light emission in a respective one of the plurality of subpixel areas;

the auxiliary electrode layer is electrically connected to the auxiliary voltage terminal; and

the auxiliary electrode signal line is electrically connected to the auxiliary voltage terminal.

2. The display substrate of claim 1 , wherein the auxiliary electrode layer comprises a plurality of auxiliary electrodes; and

an orthographic projection of each individual one of the plurality of auxiliary electrodes on the base substrate at least partially overlaps with an orthographic projection of one or multiple of the plurality of first electrodes on the base substrate.

3. The display substrate of claim 2 , wherein the orthographic projection of each individual one of the plurality of auxiliary electrodes on the base substrate at least partially overlaps with a respective one of the plurality of first electrodes on the base substrate.

4. The display substrate of claim 2 , wherein an orthographic projection of each of two adjacent first electrodes of the plurality of first electrodes respectively in two adjacent subpixel areas of the plurality of subpixel areas at least partially overlaps with an orthographic projection of a same individual one of the plurality of auxiliary electrodes.

5. The display substrate of claim 2 , wherein an orthographic projection of each of two adjacent auxiliary electrodes of the plurality of auxiliary electrodes on the base substrate at least partially overlaps with an orthographic projection of a same individual one of the plurality of first electrodes.

6. The display substrate of claim 2 , wherein an orthographic projection of each of two adjacent first electrodes of the plurality of first electrodes respectively in two adjacent subpixel areas of the plurality of subpixel areas at least partially overlaps with an orthographic projection of a same individual one of the plurality of auxiliary electrodes; and

an orthographic projection of each of two adjacent auxiliary electrodes of the plurality of auxiliary electrodes on the base substrate at least partially overlaps with an orthographic projection of a same individual one of the plurality of first electrodes.

7. The display substrate of claim 2 , wherein the plurality of auxiliary electrodes are spaced apart from each other.

8. The display substrate of claim 7 , further comprising a pixel definition layer for defining a plurality of pixel apertures, inside each of which a respective one of the plurality of first electrodes and a respective one of the plurality of auxiliary electrodes are disposed.

9. The display substrate of claim 8 , wherein the display substrate comprises a plurality of vias extending through the insulating layer; and

each individual one of the plurality of first electrodes is electrically connected to the pixel circuit through a respective one of the plurality of vias.

10. The display substrate of claim 2 , wherein the plurality of auxiliary electrodes interconnect with each other and constitute an integral electrode layer.

11. The display substrate of claim 10 , wherein the display substrate comprises a plurality of vias extending through the auxiliary electrode layer; and

each individual one of the plurality of first electrodes is electrically connected to the pixel circuit through a respective one of the plurality of vias.

12. The display substrate of claim 1 , further comprising a pixel definition layer for defining a plurality of pixel apertures;

wherein the insulating layer is on a side of the pixel definition layer and the first electrode layer facing the base substrate.

13. The display substrate of claim 1 , further comprising:

a second electrode layer;

an organic light emitting layer in a plurality of pixel apertures and between the first electrode layer and the second electrode layer; and

a plurality of thin film transistors configured to drive light emission of the display substrate;

wherein each of the plurality of first electrodes is electrically connected to a drain electrode of a respective one of the plurality of thin film transistors.

14. The display substrate of claim 1 , wherein the auxiliary voltage terminal is a common voltage terminal electrically connected to a common electrode signal line configured to provide a common voltage.

15. A display apparatus, comprising the display substrate of claim 1 .

16. A display substrate having a plurality of subpixel areas, comprising:

a base substrate;

a first electrode layer on the base substrate and comprising a plurality of first electrodes respectively in the plurality of subpixel areas;

an auxiliary electrode layer;

an insulating layer between the first electrode layer and the auxiliary electrode layer; and

a pixel definition layer for defining a plurality of pixel apertures;

wherein the first electrode layer and the auxiliary electrode layer are spaced apart and insulated from each other by the insulating layer;

an orthographic projection of each individual one of the plurality of first electrodes on the base substrate at least partially overlap with an orthographic projection of the auxiliary electrode layer on the base substrate; and

each of the plurality of first electrodes is electrically connected to a pixel circuit configured to drive light emission in a respective one of the plurality of subpixel areas;

the insulating layer is on a side of the pixel definition layer and the first electrode layer facing the base substrate;

thicknesses of the insulating layer respectively in three adjacent subpixel areas are different from each other;

the first electrode layer is a substantially transparent electrode; and

the auxiliary electrode layer is a reflective electrode.

17. A method of fabricating a display substrate having a plurality of subpixel areas, comprising:

forming a first electrode layer on a base substrate;

forming an auxiliary electrode layer;

forming an insulating layer;

forming a pixel circuit configured to drive light emission in a respective one of the plurality of subpixel areas;

forming an auxiliary voltage terminal; and

forming an auxiliary electrode signal line;

wherein forming the first electrode layer comprises forming a plurality of first electrodes respectively in the plurality of subpixel areas;

the insulating layer is formed between the first electrode layer and the auxiliary electrode layer;

the first electrode layer and the auxiliary electrode layer are formed to be spaced apart and insulated from each other by the insulating layer;

the first electrode layer and the auxiliary electrode layer are formed so that an orthographic projection of each individual one of the plurality of first electrodes on the base substrate at least partially overlap with an orthographic projection of the auxiliary electrode layer on the base substrate;

each of the plurality of first electrodes is formed to be electrically connected to a pixel circuit;

the auxiliary electrode layer is electrically connected to the auxiliary voltage terminal; and

the auxiliary electrode signal line is electrically connected to the auxiliary voltage terminal.

18. The method of claim 17 , wherein forming the auxiliary electrode layer comprises forming a plurality of auxiliary electrodes; and

wherein the auxiliary electrode layer and the first electrode layer are formed so that an orthographic projection of each individual one of the plurality of auxiliary electrodes on the base substrate at least partially overlaps with an orthographic projection of one or multiple of the plurality of first electrodes on the base substrate.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2019
From: YANG, CHENGCHUNG
To: BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 048618/0770 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2019
From: ZHANG, BIN
To: BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 048618/0773 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2019
From: ZHOU, TINGTING
To: BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 048618/0779 →
Priority Claims (1)
CN 201711033037.4 · Oct 27, 2017 · national
Continuity (1)
Related Publication 20210367003A1 · Nov 25, 2021