IP Library Granted Patent US 10,741,696
Granted Patent B2
US 10,741,696 · App. 16/336,481 · Granted Aug 11, 2020

Semiconductor device and method for manufacturing same

Inventors: Masahiko Suzuki (Sakai, JP); Hajime Imai (Sakai, JP); Hideki Kitagawa (Sakai, JP); Tetsuo Kikuchi (Sakai, JP); Setsuji Nishimiya (Sakai, JP); Teruyuki Ueda (Sakai, JP); Kengo Hara (Sakai, JP); Tohru Daitoh (Sakai, JP); Toshikatsu Itoh (Sakai, JP)
Assignee: SHARP KABUSHIKI KAISHA
H01L29/78693G02F1/1368G02F1/13454G02F1/134363H01L21/02565H01L21/02592H01L21/02631H01L27/124H01L27/1225H01L27/1251H01L29/247H01L29/66969H01L29/78675H01L29/78696G02F1/136227G02F2001/13685G02F2001/134372G02F2202/104
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Quick Facts
Patent No.
US 10,741,696
App. No.
16/336,481
Granted
Aug 11, 2020
Kind
B2
Abstract

A semiconductor device includes a thin film transistor including a semiconductor layer, a gate electrode, a gate insulating layer, a source electrode, a drain electrode, the semiconductor layer includes a layered structure including a first oxide semiconductor layer including In and Zn, in which an atomic ratio of In with respect to all metallic elements included in the first oxide semiconductor layer is higher than an atomic ratio of Zn, a second oxide semiconductor layer including In and Zn, in which an atomic ratio of Zn with respect to all metallic elements included in the second oxide semiconductor layer is higher than an atomic ratio of In, and an intermediate oxide semiconductor layer arranged between the first oxide semiconductor layer and the second oxide semiconductor layer, and the first and second oxide semiconductor layers are crystalline oxide semiconductor layers, and the intermediate oxide semiconductor layer is an amorphous oxide semiconductor layer, and the first oxide semiconductor layer is arranged nearer to the gate insulating layer than the second oxide semiconductor layer.

Claims (48)

1. A semiconductor device comprising:

a substrate; and

a thin film transistor supported on the substrate,

wherein the thin film transistor includes a semiconductor layer, a gate electrode, a gate insulating layer formed between the gate electrode and the semiconductor layer, and a source electrode and a drain electrode being in contact with the semiconductor layer,

the semiconductor layer includes a layered structure including

a first oxide semiconductor layer including In and Zn, in which an atomic ratio of In with respect to all metallic elements included in the first oxide semiconductor layer is higher than an atomic ratio of Zn,

a second oxide semiconductor layer including In and Zn, in which an atomic ratio of Zn with respect to all metallic elements included in the second oxide semiconductor layer is higher than an atomic ratio of In, and

an intermediate oxide semiconductor layer arranged between the first oxide semiconductor layer and the second oxide semiconductor layer,

the first and second oxide semiconductor layers are crystalline oxide semiconductor layers,

the intermediate oxide semiconductor layer is an amorphous oxide semiconductor layer,

the first oxide semiconductor layer is arranged nearer to the gate insulating layer than the second oxide semiconductor layer, and

the first oxide semiconductor layer includes In, Sn, and Zn, and the second oxide semiconductor layer includes In, Ga, and Zn.

2. The semiconductor device according to claim 1 ,

wherein the intermediate oxide semiconductor layer includes In and Zn, and

an atomic ratio of Zn and an atomic ratio of In with respect to all metallic elements included in the intermediate oxide semiconductor layer are approximately identical to each other.

3. The semiconductor device according to claim 1 ,

wherein the intermediate oxide semiconductor layer is in contact with the first oxide semiconductor layer and the second oxide semiconductor layer.

4. The semiconductor device according to claim 1 ,

wherein the intermediate oxide semiconductor layer includes In, Ga, and Zn.

5. The semiconductor device according to claim 1 ,

wherein a thickness of the first oxide semiconductor layer is smaller than a thickness of the second oxide semiconductor layer.

6. The semiconductor device according to claim 1 ,

wherein an energy gap G 1 of the first oxide semiconductor layer, an energy gap G 2 of the second oxide semiconductor layer, and an energy gap Gm of the intermediate oxide semiconductor layer satisfy G 2 >Gm>G 1 .

7. The semiconductor device according to claim 1 ,

wherein the thin film transistor includes a bottom gate structure, and the first oxide semiconductor layer is in contact with an upper face of the gate insulating layer.

8. The semiconductor device according to claim 1 ,

wherein the thin film transistor includes a channel etched structure.

9. A semiconductor device comprising:

a substrate; and

a thin film transistor supported on the substrate,

wherein the thin film transistor includes a semiconductor layer, a gate electrode, a gate insulating layer formed between the gate electrode and the semiconductor layer, and a source electrode and a drain electrode being in contact with the semiconductor layer,

the semiconductor layer includes a layered structure including

a first oxide semiconductor layer including In and Zn, in which an atomic ratio of In with respect to all metallic elements included in the first oxide semiconductor layer is higher than an atomic ratio of Zn,

a second oxide semiconductor layer including In and Zn, in which an atomic ratio of Zn with respect to all metallic elements included in the second oxide semiconductor layer is higher than an atomic ratio of In,

an intermediate oxide semiconductor layer arranged between the first oxide semiconductor layer and the second oxide semiconductor layer, the intermediate oxide semiconductor layer including In and Zn, in which an atomic ratio of Zn and an atomic ratio of In with respect to all metallic elements included in the intermediate oxide semiconductor layer are approximately identical to each other, and the first oxide semiconductor layer is arranged nearer to the gate insulating layer than the second oxide semiconductor layer, and

the first oxide semiconductor layer includes In, Sn, and Zn, and the second oxide semiconductor layer includes In, Ga, and Zn.

10. The semiconductor device according to claim 9 ,

wherein the first and second oxide semiconductor layers are crystalline oxide semiconductor layers.

11. The semiconductor device according to claim 9 ,

wherein the intermediate oxide semiconductor layer is an amorphous oxide semiconductor layer.

12. The semiconductor device according to claim 10 ,

wherein the intermediate oxide semiconductor layer includes a crystallite, the crystal size of which is smaller than those of the first and second oxide semiconductor layers.

13. A manufacturing method for a semiconductor device, the method comprising:

(A) forming a gate electrode and a gate insulating layer covering the gate electrode on a substrate;

(B) forming an oxide semiconductor layered film by forming a first oxide semiconductor film including In, Sn and Zn, an intermediate oxide semiconductor film, and a second oxide semiconductor film including In, Ga, and Zn in this order, the first oxide semiconductor film and the second oxide semiconductor film being crystalline oxide semiconductor films, the intermediate oxide semiconductor film being an amorphous oxide semiconductor film, an atomic ratio of In with respect to all metallic elements included in the first oxide semiconductor film being higher than an atomic ratio of Zn, and an atomic ratio of Zn with respect to all metallic elements included in the second oxide semiconductor film being higher than an atomic ratio of In;

(C) performing heat treatment on the oxide semiconductor layered film at a temperature of 300 degrees Celsius or higher and 500 degrees Celsius or less, the amorphous oxide semiconductor film being maintained in an amorphous state;

(D) forming a semiconductor layer including a first oxide semiconductor layer, an intermediate oxide semiconductor layer, a second oxide semiconductor layer in this order on the gate insulating later by patterning the oxide semiconductor layered film after the (C), the first oxide semiconductor film and the second oxide semiconductor film being crystalline oxide semiconductor films, and the intermediate oxide semiconductor layer being an amorphous oxide semiconductor film; and

(E) forming a source electrode and a drain electrode being in contact with the semiconductor layer, thereby acquiring a thin film transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2019
From: SUZUKI, MASAHIKO; IMAI, HAJIME; KITAGAWA, HIDEKI; KIKUCHI, TETSUO; NISHIMIYA, SETSUJI; UEDA, TERUYUKI; HARA, KENGO; DAITOH, TOHRU; ITOH, TOSHIKATSU
To: SHARP KABUSHIKI KAISHA
Reel/Frame 048694/0443 →
Priority Claims (1)
JP 2016-188067 · Sep 27, 2016 · national
Continuity (1)
Related Publication 20190326443A1 · Oct 24, 2019
Cited By (1)
US 12,300,753