Solid-state imaging element and electronic device
A solid-state imaging element of the present disclosure includes a pixel. The pixel includes a charge accumulation unit that accumulates a charge photoelectrically converted by a photoelectric conversion unit, a reset transistor that selectively applies a reset voltage to the charge accumulation unit, an amplification transistor having a gate electrode electrically connected to the charge accumulation unit, and a selection transistor connected in series to the amplification transistor. Additionally, the solid-state imaging element includes a first wiring electrically connecting the charge accumulation unit and the gate electrode of the amplification transistor, a second wiring electrically connected to a common connection node of the amplification transistor and the selection transistor and formed along the first wiring, and a third wiring electrically connecting the amplification transistor and the selection transistor.
1. A solid-state imaging element, comprising:
a pixel, wherein the pixel comprises:
circuitry configured to accumulate a charge photoelectrically converted by an organic photoelectric conversion film;
a reset transistor configured to selectively apply a reset voltage to the circuitry;
an amplification transistor having a gate electrode electrically connected to the circuitry; and
a selection transistor connected in series to the amplification transistor;
a first wiring configured to electrically connect the circuitry and the gate electrode of the amplification transistor;
a second wiring electrically connected to a common connection node of the amplification transistor and the selection transistor, wherein the second wiring is along the first wiring; and
a third wiring configured to electrically connect the amplification transistor and the selection transistor.
2. The solid-state imaging element according to claim 1 , wherein, based on accumulation of holes by the circuitry, the reset voltage is at a ground (GND) level.
3. The solid-state imaging element according to claim 1 , wherein, based on accumulation of electrons by the circuitry, the reset voltage is a power supply voltage or a boosted voltage having a voltage value higher than the power supply voltage.
4. The solid-state imaging element according to claim 1 , wherein the first wiring and the second wiring are in parallel in different wiring layers.
5. The solid-state imaging element according to claim 1 , wherein the first wiring and the second wiring are in parallel in a same wiring layer.
6. The solid-state imaging element according to claim 1 , wherein wiring of any one of the first wiring, the second wiring, and the third wiring includes a wiring material different from a wiring material of the other wirings of the first wiring, the second wiring, and the third wiring.
7. The solid-state imaging element according to claim 1 , wherein at least two photoelectric conversion regions are stacked in a light incident direction in a semiconductor substrate on which pixels are formed.
8. The solid-state imaging element according to claim 1 , wherein the pixel has a back-illuminated pixel structure.
9. An electronic device, including:
a solid-state imaging element comprising:
a pixel, wherein the pixel comprises:
circuitry configured to accumulate a charge photoelectrically converted by an organic photoelectric conversion film;
a reset transistor configured to selectively apply a reset voltage to the circuitry;
an amplification transistor having a gate electrode electrically connected to the; and
a selection transistor connected in series to the amplification transistor;
a first wiring configured to electrically connect the circuitry and the gate electrode of the amplification transistor;
a second wiring electrically connected to a common connection node of the amplification transistor and the selection transistor, wherein the second wiring is along the first wiring; and
a third wiring configured to electrically connect the amplification transistor and the selection transistor.