Integrated assemblies comprising memory cells and shielding material between the memory cells, and methods of forming integrated assemblies
Some embodiments include a memory device having a buried wordline, a shield plate, and an access device. The access device includes first and second diffusion regions and a channel region. The diffusion regions and the channel region are arranged vertically so that the channel region is between the first and second diffusion regions. The wordline is adjacent to a first side surface of the channel region, and the shield plate is adjacent to a second side surface of the channel region; with the first and second side surfaces being in opposing relation to one another. Some embodiments include methods of forming integrated assemblies.
1. A memory device comprising:
a buried wordline extending across a horizontal upper surface of a base;
a shield plate;
an access device comprising first and second diffusion regions and a channel region, the first and second diffusion regions and the channel region being arranged vertically relative to the horizontal upper surface of the base so that the channel region is elevationally between the first and second diffusion regions; and
wherein the access device is adjacent the wordline and the shield plate so that a part of the wordline is proximate a first side surface of the channel region with an intervention of a first insulating material therebetween and that a part of the shield plate is proximate a second side surface of the channel region with an intervention of a second insulating material therebetween.
2. The memory device of claim 1 further comprising:
a bitline in an electrical connection with first diffusion region; and
a storage element in an electrical connection with the second diffusion region.
3. A memory device comprising:
a buried wordline extending across a horizontal upper surface of a base;
a shield plate comprising polycrystalline semiconductive material doped with impurities;
an access device comprising first and second diffusion regions and a channel region, the first and second diffusion regions and the channel region being arranged vertically so that the channel region is between the first and second diffusion regions; and
wherein the access device is adjacent the wordline and the shield plate so that a part of the wordline is proximate a first side surface of the channel region with an intervention of a first insulating material therebetween and that a part of the shield plate is proximate a second side surface of the channel region with an intervention of a second insulating material therebetween.
4. The memory device of claim 3 wherein the first and second diffusion regions, and the shield plate, are all a same conductivity type.
5. The memory device of claim 4 wherein the first and second diffusion regions are n-type, and wherein the shield plate is also n-type.
6. The memory device of claim 3 wherein the first and second diffusion regions are a first conductivity type, and wherein the shield plate is a second conductivity type opposite to the first conductivity type.
7. The memory device of claim 6 wherein the first and second diffusion regions are n-type, and wherein the shield plate is p-type.
8. The memory device of claim 7 wherein the channel region is within a body region of the access device, and wherein the shield plate directly contacts the body region of the access device.
9. The memory device of claim 1 further comprising:
a bitline coupled to the first diffusion region;
a storage element coupled to the second diffusion region; and
wherein each of the wordline and the bitline comprises a metal.
10. The memory device of claim 9 wherein the wordline extends horizontally in a first direction, and wherein the bitline extends horizontally in a second direction which crosses the first direction.
11. The memory device of claim 1 wherein the shield plate is coupled with a reference source having ground voltage.