Apparatuses and methods of entering unselected memories into a different power mode during multi-memory operation
Disclosed are examples of apparatuses including memory devices and systems comprising memories sharing a common enable signal, wherein the memories may be put into different power modes. Example methods for setting the different power modes of the memories are disclosed. In some examples, different power modes may be set by issuing memory group-level commands, memory-level commands, or combinations thereof.
1. A method, comprising:
receiving a common enable signal at a first memory and a second memory;
in response to the common enable signal being active, transitioning the first memory and the second memory from a first power mode to a second power mode;
receiving a first command at the first memory and the second memory to indicate selection of the first memory;
receiving a second command at the first memory and the second memory; and
in response to receipt of both the second command and the first command indicating selection of the first memory, at the second memory, transitioning the second memory from the second power mode to a third power mode.
2. The method of claim 1 , wherein a power of the second power mode of the first memory is greater than a power of the third mode of the second memory.
3. The method of claim 1 , further comprising:
receiving, at control logic of the second memory, the common enable signal and an internal command, Wherein the internal command is based on a received memory operation command; and
providing, from the control logic, internal control signals responsive to the internal commands and the common enable signal.
4. The method of claim 1 , wherein the first power mode is different than the third power mode.
5. The method of claim 1 , wherein the first power mode and the third power mode are the same.
6. The method of claim 1 , wherein power of the third power mode is between a power of the first power mode and a power of the second power mode.
7. The method of claim 1 , wherein the first power mode and the third power mode include a stand-by power mode.
8. The method of claim 1 , further comprising receiving the first and second commands on a shared communication channel coupled to the first memory and the second memory.
9. The method of claim 1 , wherein the common enable signal is received from a controller.
10. The method of claim 1 , wherein the first power mode is different than the third power mode.
11. A method, comprising:
in response to receipt of an active enable signal, transitioning a plurality of memories of a memory group from a first mode of operation to a second mode of operation;
receiving a select command at each of the plurality of memories of the memory group to indicate selection of a first memory of the plurality of memories; and
in response to receipt of a group-level command at each of the plurality of memories of the memory group and based on selection of the first memory of the plurality of memories via the select command, transitioning memories of the plurality of memories other than the first memory from the second mode of operation to a third mode of operation.
12. The method of claim 11 , further comprising receiving the active enable signal at each memory of the plurality of memories.
13. The method of claim 11 , wherein the first power mode and the third power mode are the same.
14. The method of claim 11 , wherein power of the third power mode is between a power of the first power mode and a power of the second power mode.
15. The method of claim 11 , further comprising transitioning the plurality of memories to a standby mode of operation prior to receipt of the active enable signal.
16. The method of claim 15 , wherein transition of the plurality of memories to the standby mode of operation is in response to receipt of an inactive enable signal.
17. The method of claim 16 , further comprising receiving the inactive enable signal at each memory of the plurality of memories.
18. The method of claim 11 , further comprising enabling an input-output circuit of a memory the plurality of memories based on a transition to the first mode of operation.
19. The method of claim 11 , further comprising disabling an input-output circuit of a memory the plurality of memories based on a transition to the second mode of operation.