Sequential memory access operations
Methods of operating a memory include performing a memory access operation, obtaining an address corresponding to a subsequent memory access operation prior to stopping the memory access operation, stopping the memory access operation, sharing charge between access lines used for the memory access operation and access lines to be used for the subsequent memory access operation, and performing the subsequent memory access operation.
1. A method of operating a memory, comprising:
performing a memory access operation;
obtaining an address corresponding to a subsequent memory access operation prior to stopping the memory access operation;
stopping the memory access operation;
sharing charge between access lines used for the memory access operation and access lines to be used for the subsequent memory access operation; and
performing the subsequent memory access operation;
wherein the memory access operation is a first type of memory access operation, and the subsequent memory access operation is a second type of memory access operation different than the first type of memory access operation;
wherein at least one access line of the access lines used for the memory access operation is connected to a control gate of a memory cell selected for the memory access operation; and
wherein at least one access line of the access lines used for the subsequent memory access operation is connected to a control gate of a memory cell selected for the subsequent memory access operation.
2. The method of claim 1 , wherein obtaining the address corresponding to the subsequent memory access operation comprises receiving the address from an external controller of the memory.
3. The method of claim 1 , wherein the first type of memory access operation and the second type of memory access operation are each selected from a group consisting of a program operation, a read operation and an erase operation.
4. The method of claim 1 , wherein stopping the memory access operation comprises completing the memory access operation or suspending the memory access operation.
5. The method of claim 1 , further comprising:
obtaining an address corresponding to a next subsequent memory access operation prior to stopping the subsequent memory access operation;
stopping the subsequent memory access operation;
sharing charge between access lines used for the subsequent memory access operation and access lines to be used for the next subsequent memory access operation; and
performing the next subsequent memory access operation.
6. The method of claim 5 , wherein stopping the memory access operation comprises suspending the memory access operation, and wherein performing the next subsequent memory access operation comprises resuming the memory access operation.
7. The method of claim 5 , further comprising discharging the access lines used for the memory access operation after sharing charge with the access lines to be used for the subsequent memory access operation.
8. The method of claim 5 , wherein the access lines used for the memory access operation are not discharged after sharing charge with the access lines to be used for the subsequent memory access operation.
9. A method of operating a memory, comprising:
obtaining an address corresponding to a memory access operation;
performing the memory access operation;
obtaining an address corresponding to a subsequent memory access operation, wherein the address corresponding to the subsequent memory access operation is obtained from a device external to the memory, and obtained while performing the memory access operation;
stopping the memory access operation;
sharing charge between access lines used for the memory access operation and access lines to be used for the subsequent memory access operation; and
performing the subsequent memory access operation;
wherein at least one access line of the access lines used for the subsequent memory access operation is connected to a control gate of a memory cell selected for the memory access operation; and
wherein at least one access line of the access lines used for the subsequent memory access operation is connected to a control gate of a memory cell selected for the subsequent memory access operation.
10. The method of claim 9 , further comprising:
indicating that the memory is busy while performing the memory access operation; and
continuing to indicate that the memory is busy from a time of stopping the memory access operation to a time of performing the subsequent memory access operation.
11. The method of claim 9 , wherein the memory access operation and the subsequent memory access operation are each of a type selected from the group consisting of a program operation, a read operation and an erase operation, and wherein the memory access operation and the subsequent memory access operation of the same type.
12. The method of claim 9 , wherein stopping the memory access operation comprises completing the memory access operation or suspending the memory access operation.
13. The method of claim 9 , further comprising:
obtaining an address corresponding to a next subsequent memory access operation prior to stopping the subsequent memory access operation;
stopping the subsequent memory access operation; and
performing the next subsequent memory access operation.
14. The method of claim 13 , wherein stopping the memory access operation comprises suspending the memory access operation and wherein performing the next subsequent memory access operation comprises resuming the memory access operation.
15. The method of claim 13 , wherein the access lines used for the memory access operation are not discharged between sharing charge with the access lines to be used for the subsequent memory access operation and resuming the memory access operation.
16. The method of claim 13 , further comprising:
prior to performing the next subsequent memory access operation, sharing charge between the access lines used for the subsequent memory access operation and access lines to be used for the next subsequent memory access operation.
17. A method of operating a memory, comprising:
obtaining an address corresponding to a memory access operation;
performing the memory access operation;
obtaining an address corresponding to a subsequent memory access operation, wherein the address corresponding to the subsequent memory access operation is obtained from a device external to the memory, and obtained while performing the memory access operation;
stopping the memory access operation before completion of the memory access operation;
connecting access lines used for the memory access operation and access lines to be used for the subsequent memory access operation;
sharing charge between the access lines used for the memory access operation and the access lines to be used for the subsequent memory access operation;
disconnecting the access lines used for the memory access operation from the access lines to be used for the subsequent memory access operation; and
performing the subsequent memory access operation.
18. The method of claim 17 , further comprising:
discharging the access lines used for the memory access operation after disconnecting the access lines used for the memory access operation from the access lines to be used for the subsequent memory access operation.
19. The method of claim 17 , further comprising:
resuming the memory access operation after completion of the subsequent memory access operation.
20. The method of claim 19 , further comprising:
sharing charge between access lines to be used for resuming the memory access operation and the access lines used for the subsequent memory access operation.