IP Library Granted Patent US 11,275,508
Granted Patent B2
US 11,275,508 · App. 16/361,445 · Granted Mar 15, 2022

Host controlled enablement of automatic background operations in a memory device

Inventors: Francesco Falanga (Pozzuoli, IT); Danilo Caraccio (Buonalbergo, IT)
Assignee: Micron Technology, Inc.
G06F3/061G06F3/0619G06F3/0659G06F3/0665G06F3/0689G06F12/0246G06F2212/7211
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Quick Facts
Patent No.
US 11,275,508
App. No.
16/361,445
Granted
Mar 15, 2022
Kind
B2
Abstract

Methods for automatically performing a background operation in a memory device might include automatically performing the background operation responsive to automatic performance of the background operation being enabled and receiving a start command.

Claims (48)

1. A method for automatically performing a background operation in a memory device, the method comprising:

automatically performing the background operation responsive to automatic performance of the background operation being enabled and receiving a start command,

wherein the automatic performance of the background operation being enabled comprises a register of the memory device being set prior to receiving the start command;

receiving the start command as a last received command prior to automatically performing the background operation.

2. The method of claim 1 , wherein the start command is received by the memory device from a host.

3. The method of claim 2 , further comprising:

receiving control data from the host indicating enablement of the automatic performance of the background operation; and

storing the control data in a register of the memory device.

4. The method of claim 2 , further comprising:

receiving a read command from the host that requests data from a register of the memory device; and

transmitting the data to the host.

5. The method of claim 4 , wherein the data is indicative of whether the memory device supports host controlled enablement of the automatic performance of the background operation.

6. The method of claim 1 , wherein automatically performing the background operation comprises automatically performing a first background operation, the method further comprising:

automatically performing a second background operation responsive to automatic performance of the second background operation being enabled and receiving the start command.

7. The method of claim 1 , further comprising:

halting performance of the background operation responsive to receiving a different command.

8. A method for automatically performing background operations in a memory device, the method comprising:

automatically performing a first background operation responsive to automatic performance of the first background operation being enabled and receiving a start command; and

automatically performing a second background operation responsive to automatic performance of the second background operation being enabled and receiving the start command;

wherein the automatic performance of the first background operation being enabled and the automatic performance of the second background operation being enabled comprises a condition selected from a group consisting of a register of the memory device being set, a first register of the memory device and a second register of the memory device being set, and a first bit and a second bit of a register of the memory device being set.

9. A method for automatically performing background operations in a memory device, the method comprising:

automatically performing a first background operation responsive to automatic performance of the first background operation being enabled and receiving a start command; and

automatically performing a second background operation responsive to the automatic performance of the second background operation being enabled and a particular time period expiring;

wherein the automatic performance of the first background operation being enabled comprises a register of the memory device being set prior to receiving the start command.

10. The method of claim 9 , wherein the register of the memory device being set comprises a particular bit of the register being set.

11. The method of claim 9 , wherein the automatic performance of the second background operation being enabled comprises the register of the memory device being set.

12. The method of claim 9 , wherein the automatic performance of the second background operation being enabled comprises a different register of the memory device being set.

13. The method of claim 9 , further comprising:

receiving a time period value indicative of the particular time period; and

storing the time period value in a register of the memory device.

14. The method of claim 9 , further comprising:

receiving control data from a host; and

storing the control data in a register of the memory device.

15. The method of claim 14 , wherein the control data comprises a first state indicating enablement of the automatic performance of the first background operation and enablement of the automatic performance of the second background operation.

16. The method of claim 15 , wherein the control data comprises a second state indicating disablement of the automatic performance of the first background operation and disablement of the automatic performance of the second background operation.

17. The method of claim 9 , wherein automatically performing the second background operation responsive to the automatic performance of the second background operation being enabled and the particular time period expiring comprises automatically performing the second background operation responsive to the automatic performance of the second background operation being enabled and the particular time period expiring after receiving data to a register of the memory device indicating a desire to start the second background operation.

18. A method for automatically performing background operations in a memory device, the method comprising:

automatically performing a first background operation responsive to automatic performance of the first background operation being enabled and receiving a start command;

automatically performing a second background operation responsive to the automatic performance of the second background operation being enabled and a particular time period expiring;

receiving a time period value indicative of the particular time period;

storing the time period value in a first register of the memory device;

receiving a unit of measure value associated with the time period value; and

storing the unit of measure value in a second register of the memory device.

19. A method for automatically performing background operations in a memory device, the method comprising:

automatically performing a first background operation responsive to automatic performance of the first background operation being enabled and receiving a start command; and

automatically performing a second background operation responsive to automatic performance of the second background operation being enabled and receiving the start command;

wherein the automatic performance of the first background operation being enabled comprises a condition selected from a group consisting of a first register of the memory device being set, and a first bit of a second register of the memory device being set; and

wherein the automatic performance of the second background operation being enabled comprises a condition selected from a group consisting of the first register of the memory device being set when the first register of the memory device being set is indicative of enablement of the automatic performance of the first background operation, a third register of the memory device being set when the first register of the memory device being set is indicative of enablement of the automatic performance of the first background operation, and a second bit of the second register of the memory device being set when the first bit of the second register of the memory device being set is indicative of enablement of the automatic performance of the first background operation.

Assignments (5)
CONFIRMATORY LICENSE Recorded Oct 23, 2023
From: MICRON TECHNOLOGY, INC.
To: LODESTAR LICENSING GROUP LLC
Reel/Frame 065313/0699 →
RELEASE OF SECURITY INTEREST Recorded Nov 15, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051041/0317 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050724/0392 →
SUPPLEMENT NO. 12 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048948/0677 →
SUPPLEMENT NO. 3 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 048951/0902 →