IP Library Granted Patent US 11,074,008
Granted Patent B2
US 11,074,008 · App. 16/369,996 · Granted Jul 27, 2021

Technologies for providing stochastic key-value storage

Inventors: Jawad B. Khan (Portland, OR); Richard Coulson (Portland, OR)
Assignee: Intel Corporation
G06F3/0658G06F3/0604G06F3/0683G06F9/30036G06F11/10G06F11/1048G06F12/0207
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Quick Facts
Patent No.
US 11,074,008
App. No.
16/369,996
Granted
Jul 27, 2021
Kind
B2
Abstract

Technologies for performing a hyper-dimensional operation in a memory of the compute device include a memory and a memory controller. The memory controller is configured to receive a query from a requestor and determine, in response to a receipt of the query, a key hyper-dimensional vector associated with the query, perform a hyper-dimensional operation to determine a reference hyper-dimensional vector associated with a value to the key. The memory controller is further configured to perform a nearest neighbor search by searching columns of a stochastic associative array of a hyper-dimensional vector table in the memory, identify a closest matching row in the stochastic associative array relative to the reference hyper-dimensional vector, wherein the closest matching row indicates a closest matching value hyper-dimensional vector, and output a value associated with the closest matching value hyper-dimensional vector.

Claims (64)

1. A device comprising:

a memory; and

a memory controller configured to:

receive a key and a memory address of the key stored in the memory;

generate a key hyper-dimensional vector associated with the key by randomly assigning a bit value, adding a logical pointer indicative of the memory address where the key is stored in the memory and includes an error correcting code;

store the key hyper-dimensional vector in a hyper-dimensional vector table;

receive a value and a memory address of the value stored in the memory;

generate a value hyper-dimensional vector associated with the value by randomly assigning a bit value, adding a logical pointer indicative of the memory address where the value is stored in the memory and an error correcting code;

store the value hyper-dimensional vector in the hyper-dimensional vector table; and

generate a search hyper-dimensional vector using the key hyper-dimensional vector and the value hyper-dimensional vector to be used for future lookup operations.

2. The device of claim 1 , wherein to generate the search hyper-dimensional vector comprises to:

generate a bound vector by performing a bitwise XOR operation on the key hyper-dimensional vector and the value hyper-dimensional vector;

perform a bitwise sum operation on the bound vector and a previous vector that has bitwise sum of all previously bound hyper-dimensional vectors to generate a resulting vector;

determine a total number of vectors that were added to generate the resulting vector; and

perform a threshold operation on the resulting vector by dividing the resulting vector by the total number of vectors to generate a resulting threshold bit value and setting a corresponding bit value to one if the resulting threshold bit value is greater than a threshold value and to zero if the resulting threshold bit value is less than the threshold value.

3. The device of claim 1 , wherein the memory controller is further to:

generate a key hash table including a key vector pointer indicative of a memory location of where the key hyper-dimensional vector is stored in the hyper-dimensional vector table; and

generate a value hash table including a value vector pointer indicative of a memory location of where the value hyper-dimensional vector is stored in the hyper-dimensional vector table.

4. A device comprising:

a memory; and

a memory controller configured to:

receive a query from a requestor;

determine, in response to a receipt of the query, a key hyper-dimensional vector associated with the query;

perform a hyper-dimensional operation to determine a reference hyper-dimensional vector associated with a value to the key;

perform a nearest neighbor search by searching columns of a stochastic associative array of a hyper-dimensional vector table in the memory;

identify a closest matching row in the stochastic associative array relative to the reference hyper-dimensional vector, wherein the closest matching row indicates a closest matching value hyper-dimensional vector; and

output a value associated with the closest matching value hyper-dimensional vector.

5. The device of claim 4 , wherein the hyper-dimensional vector table includes a plurality of value hyper-dimensional vectors, each value hyper-dimensional vector includes a hyper-dimensional vector with a pointer to a memory address where the value is stored in the memory and an error correction code.

6. The device of claim 4 , wherein to perform the hyper-dimensional operation to determine the reference hyper-dimensional vector associated with a value to the key comprises to perform an XOR operation on the key hyper-dimensional vector with a search hyper-dimensional vector.

7. The device of claim 4 , wherein to perform the nearest neighbor search comprises to search the columns of the stochastic associative array for matching bit values relative to a corresponding bit position of the reference hyper-dimensional vector, wherein each column of the stochastic associative array represents a bit value of a corresponding row.

8. The device of claim 7 , wherein to identify the closest matching row comprises to identify the closest matching row in the stochastic associative array that has a highest number of matching bit values.

9. The device of claim 4 , wherein to perform the nearest neighbor search comprises to search a subset of columns of the stochastic associative array for matching bit values relative to a corresponding bit position of the reference hyper-dimensional vector.

10. The device of claim 5 , wherein the memory controller is further to:

perform an error correction algorithm to correct one or more errors in the closest matching value hyper-dimensional vector; and

output, in response to a performance of the error correction algorithm, a corrected value of the closest matching value hyper-dimensional vector.

11. The device of claim 10 , wherein to output the value associated with the closest matching row comprises to obtain a value from a pointer indicated in the closest matching value hyper-dimensional vector.

12. A method comprising:

receiving, by a memory controller of a compute device, a key and a memory address of the key stored in a memory of the compute device;

generating, by the memory controller, a key hyper-dimensional vector associated with the key by randomly assigning a bit value, adding a logical pointer indicative of the memory address where the key is stored in the memory and includes an error correcting code;

storing, by the memory controller, the key hyper-dimensional vector in a hyper-dimensional vector table;

receiving, by the memory controller, a value and a memory address of the value stored in the memory;

generating, by the memory controller, a value hyper-dimensional vector associated with the value by randomly assigning a bit value, adding a logical pointer indicative of the memory address where the value is stored in the memory and an error correcting code;

storing, by the memory controller, the value hyper-dimensional vector in the hyper-dimensional vector table; and

generating, by the memory controller, a search hyper-dimensional vector using the key hyper-dimensional vector and the value hyper-dimensional vector to be used for future lookup operations.

13. The method of claim 12 , wherein generating the search hyper-dimensional vector comprises:

generating a bound vector by performing a bitwise XOR operation on the key hyper-dimensional vector and the value hyper-dimensional vector;

performing a bitwise sum operation on the bound vector and a previous vector that has bitwise sum of all previously bound hyper-dimensional vectors to generate a resulting vector;

determining a total number of vectors that were added to generate the resulting vector; and

performing a threshold operation on the resulting vector by dividing the resulting vector by the total number of vectors to generate a resulting threshold bit value and setting a corresponding bit value to one if the resulting threshold bit value is greater than a threshold value and to zero if the resulting threshold bit value is less than the threshold value.

14. The method of claim 12 further comprising:

generating, by the memory controller, a key hash table including a key vector pointer indicative of a memory location of where the key hyper-dimensional vector is stored in the hyper-dimensional vector table; and

generating, by the memory controller, a value hash table including a value vector pointer indicative of a memory location of where the value hyper-dimensional vector is stored in the hyper-dimensional vector table.

15. The method of claim 14 further comprising:

receiving, by the memory controller, a query from a requestor indicative of a key hyper-dimensional vector;

determining, in response to receiving the query and by the memory controller, the key hyper-dimensional vector associated with the query;

performing, by the memory controller, a hyper-dimensional operation to determine a reference hyper-dimensional vector associated with a value to the key;

performing, by the memory controller, a nearest neighbor search by searching columns of a stochastic associative array of a hyper-dimensional vector table in the memory;

identifying, by the memory controller, a closest matching row in the stochastic associative array relative to the reference hyper-dimensional vector, wherein the closest matching row indicates a closest matching value hyper-dimensional vector; and

outputting, by the memory controller, a value associated with the closest matching value hyper-dimensional vector.

16. The method of claim 15 , wherein the hyper-dimensional vector table includes a plurality of value hyper-dimensional vectors, each value hyper-dimensional vector includes a hyper-dimensional vector with a pointer to a memory address where the value is stored in the memory and an error correction code.

17. The method of claim 15 , wherein performing the hyper-dimensional operation to determine the reference hyper-dimensional vector associated with a value to the key comprises performing, by the memory controller, an XOR operation on the key hyper-dimensional vector with a search hyper-dimensional vector.

18. The method of claim 15 , wherein performing the nearest neighbor search comprises searching, by the memory controller, the columns of the stochastic associative array for matching bit values relative to a corresponding bit position of the reference hyper-dimensional vector, wherein each column of the stochastic associative array represents a bit value of a corresponding row.

19. The method of claim 18 , wherein identifying the closest matching row comprises identifying, by the memory controller, the closest matching row in the stochastic associative array that has a highest number of matching bit values.

20. The method of claim 15 , wherein performing the nearest neighbor search comprises searching, by the memory controller, a subset of columns of the stochastic associative array for matching bit values relative to a corresponding bit position of the reference hyper-dimensional vector.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 1, 2019
From: KHAN, JAWAD B.; COULSON, RICHARD
To: INTEL CORPORATION
Reel/Frame 049052/0771 →
Continuity (1)
Related Publication 20190227739A1 · Jul 25, 2019