Non-volatile memory out-of-band management interface for all host processor power states
Systems, apparatuses and methods may provide for technology that receives, at a remote access controller of a computing system, configuration data associated with a non-volatile memory of the computing system, wherein the configuration data is received while the computing system is in a sleep state. The technology may also store the configuration data and provide a host processor of the computing system with access to the configuration data. In one example, receipt of the configuration data bypasses a memory configuration-related reboot of the computing system and the configuration data is received via an out-of-band management interface.
1. A computing system comprising:
a non-volatile memory;
a host processor coupled to the non-volatile memory;
an out-of-band management interface; and
a remote access controller, in communication with the out-of-band management interface and the host processor, including a computer readable storage medium, wherein the computer readable storage medium includes a set of executable program instructions, which when executed by the remote access controller, cause the remote access controller to:
receive, at the remote access controller via the out-of-band management interface, configuration data associated with the non-volatile memory, wherein the configuration data is to be received and accepted while the computing system and the host processor are in any power state including a sleep state after a mechanical off state,
verifying that the configuration data is supported by a target run-time environment,
store the configuration data,
mark the configuration data as not yet applied, and
provide the host processor with access to the configuration data, wherein receipt of the configuration data at the remote access controller is to bypass a memory configuration-related reboot of the computing system.
2. The computing system of claim 1 , wherein the access is to be provided to a basic input output system (BIOS) executing on the host processor, and wherein the BIOS is to retrieve the configuration data, apply the configuration data to the non-volatile memory and mark the configuration data as applied.
3. A semiconductor apparatus comprising:
one or more substrates; and
logic coupled to the one or more substrates, wherein the logic is implemented at least partly in one or more of configurable logic or fixed-functionality hardware logic, the logic coupled to the one or more substrates to:
receive, at a remote access controller of a computing system via an out-of-band management interface, configuration data associated with a non-volatile memory of the computing system, wherein the configuration data is to be received and accepted while the computing system is in any power state including a sleep state after a mechanical off state;
verify that the configuration data is supported by a target run-time environment;
store the configuration data;
mark the configuration data as not yet applied; and
provide a host processor of the computing system with access to the configuration data, wherein receipt of the configuration data at the remote access controller is to bypass a memory configuration-related reboot of the computing system.
4. The semiconductor apparatus of claim 3 , wherein the access is to be provided to a basic input output system (BIOS) executing on the host processor.
5. The semiconductor apparatus of claim 3 , wherein the logic coupled to the one or more substrates includes transistor channel regions that are positioned within the one or more substrates.
6. At least one non-transitory computer readable storage medium comprising a set of executable program instructions, which when executed by a remote access controller of a computing system, cause the computing system to:
receive, at the remote access controller via an out-of-band management interface, configuration data associated with a non-volatile memory of the computing system, wherein the configuration data is to be received and accepted while the computing system is in any power state including a sleep state after a mechanical off state;
verifying that the configuration data is supported by a target run-time environment;
store the configuration data;
mark the configuration data as not yet applied; and
provide a host processor of the computing system with access to the configuration data,
wherein receipt of the configuration data at the remote access controller is to bypass a memory configuration-related reboot of the computing system.
7. The at least one non-transitory computer readable storage medium of claim 6 , wherein the access is to be provided to a basic input output system (BIOS) executing on the host processor.
8. A method comprising:
receiving, at a remote access controller of a computing system via an out-of-band management interface, configuration data associated with a non-volatile memory of the computing system, wherein the configuration data is received and accepted while the computing system is in any power state including a sleep state after a mechanical off state;
verifying that the configuration data is supported by a target run-time environment;
storing the configuration data;
marking the configuration data as not yet applied; and
providing a host processor of the computing system with access to the configuration data, wherein receipt of the configuration data at the remote access controller bypasses a memory configuration-related reboot of the computing system.
9. The method of claim 8 , wherein the access is provided to a basic input output system (BIOS) executing on the host processor.