IP Library Granted Patent US 11,106,519
Granted Patent B2
US 11,106,519 · App. 16/374,294 · Granted Aug 31, 2021

Automotive electronic control unit reliability and safety during power standby mode

Inventor: Gil Golov (Backnang, DE)
Assignee: Micron Technology, Inc.
G06F11/076B60R16/0231B60R16/03G11C5/148G11C11/4074
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Quick Facts
Patent No.
US 11,106,519
App. No.
16/374,294
Granted
Aug 31, 2021
Kind
B2
Abstract

Disclosed are devices and methods for improved operations of a memory device. In one embodiment, a method is disclosed comprising periodically recording memory statistics of a dynamic random-access memory in a device, while the device is in a power on state; detecting a command to enter a standby state; analyzing the memory statistics to determine whether a health check should be performed; powering down the device when determining that the health check should be performed; and placing the device in standby mode when determining that the health check should not be performed.

Claims (53)

1. A method comprising:

periodically recording memory statistics of a volatile dynamic random-access memory (DRAM) in a device by monitoring operations issued to the DRAM, while the device is in a power on state;

detecting a command to enter a standby state;

analyzing, in response to the command to enter the standby state, the memory statistics to determine whether a health check should be performed;

powering down the device in response to determining that the health check should be performed, wherein the powering down the device causes data stored at the DRAM to be erased; and

placing the device in standby mode in response to determining that the health check should not be performed.

2. The method of claim 1 , the periodically recording memory statistics of a dynamic random-access memory comprising incrementing a count of errors corrected by the DRAM.

3. The method of claim 1 , the periodically recording memory statistics of a dynamic random-access memory comprising incrementing a count of memory leaks occurring in the DRAM.

4. The method of claim 3 , the incrementing a count of memory leaks occurring in the DRAM comprising:

receiving a report of memory usages of one or more currently active processes; and

identifying a memory leak if the memory usage of an active process has increased when compared to previously recorded memory usages of the active process.

5. The method of claim 3 , the analyzing the memory statistics to determine whether the health check should be performed comprising determining if the count of memory leaks is greater than zero.

6. The method of claim 2 , the analyzing the memory statistics to determine whether the health check should be performed comprising determining if the count of errors is greater than a pre-determined threshold.

7. The method of claim 1 , further comprising:

when the health check is performed:

powering up the device after powering down the device; and

placing the device in standby mode after powering up the device.

8. A non-transitory computer readable storage medium for tangibly storing computer program instructions capable of being executed by a computer processor, the computer program instructions defining the steps of:

periodically recording memory statistics of a volatile dynamic random-access memory (DRAM) in a device by monitoring operations issued to the DRAM, while the device is in a power on state;

detecting a command to enter a standby state;

analyzing, in response to the command to enter the standby state, the memory statistics to determine whether a health check should be performed;

powering down the device in response to determining that the health check should be performed, wherein the powering down the device causes data stored at the DRAM to be erased; and

placing the device in standby mode in response to determining that the health check should not be performed.

9. The non-transitory computer readable storage medium of claim 8 , the periodically recording memory statistics of a dynamic random-access memory comprising incrementing a count of errors corrected by the DRAM.

10. The non-transitory computer readable storage medium of claim 8 , the periodically recording memory statistics of a dynamic random-access memory comprising incrementing a count of memory leaks occurring in the DRAM.

11. The non-transitory computer readable storage medium of claim 10 , the incrementing a count of memory leaks occurring in the DRAM comprising:

receiving a report of memory usages of one or more currently active processes; and

identifying a memory leak if the memory usage of an active process has increased when compared to previously recorded memory usages of the active process.

12. The non-transitory computer readable storage medium of claim 10 , the analyzing the memory statistics to determine whether the health check should be performed comprising determining if the count of memory leaks is greater than zero.

13. The non-transitory computer readable storage medium of claim 9 , the analyzing the memory statistics to determine whether the health check should be performed comprising determining if the count of errors is greater than a pre-determined threshold.

14. The non-transitory computer readable storage medium of claim 8 , the computer program instructions further defining the steps of:

when the health check is performed:

powering up the device after powering down the device; and

placing the device in standby mode after powering up the device.

15. A device comprising:

a processor; and

a non-transitory storage medium for tangibly storing thereon program logic for execution by the processor, the stored program logic defining the steps of:

periodically recording memory statistics of a volatile dynamic random-access memory (DRAM) in a device, while the device is in a power on state by monitoring operations issued to the DRAM;

detecting a command to enter a standby state;

analyzing, in response to the command to enter the standby state, the memory statistics to determine whether a health check should be performed;

powering down the device in response to determining that the health check should be performed, wherein the powering down the device causes data stored at the DRAM to be erased; and

placing the device in standby mode in response to determining that the health check should not be performed.

16. The device of claim 15 , the periodically recording memory statistics of a dynamic random-access memory comprising incrementing a count of errors corrected by the DRAM.

17. The device of claim 15 , the periodically recording memory statistics of a dynamic random-access memory comprising incrementing a count of memory leaks occurring in the DRAM.

18. The device of claim 17 , the incrementing a count of memory leaks occurring in the DRAM comprising:

receiving a report of memory usages of one or more currently active processes; and

identifying a memory leak if the memory usage of an active process has increased when compared to previously recorded memory usages of the active process.

19. The device of claim 17 , the analyzing the memory statistics to determine whether the health check should be performed comprising determining if the count of memory leaks is greater than zero.

20. The device of claim 16 , the analyzing the memory statistics to determine whether the health check should be performed comprising determining if the count of errors is greater than a pre-determined threshold.

21. The device of claim 15 , the stored program logic further defining the steps of:

when the health check is performed:

powering up the device after powering down the device; and

placing the device in standby mode after powering up the device.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 7, 2025
From: MICRON TECHNOLOGY, INC.
To: LODESTAR LICENSING GROUP LLC
Reel/Frame 069774/0111 →
RELEASE OF SECURITY INTEREST Recorded Nov 15, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051041/0317 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050724/0392 →
SUPPLEMENT NO. 12 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048948/0677 →
SUPPLEMENT NO. 3 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 048951/0902 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2019
From: GOLOV, GIL
To: MICRON TECHNOLOGY, INC.
Reel/Frame 048837/0918 →